HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43947 )
Change subject: src/northbridge: Add missing <{stddef,stdint}|types> ......................................................................
src/northbridge: Add missing <{stddef,stdint}|types>
Change-Id: I3d189080b770afa5e5478e4908b3340227948498 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/amd/agesa/dimmSpd.h M src/northbridge/amd/pi/dimmSpd.h M src/northbridge/intel/gm45/memmap.c M src/northbridge/intel/haswell/memmap.c M src/northbridge/intel/haswell/northbridge.c M src/northbridge/intel/i945/memmap.c M src/northbridge/intel/ironlake/memmap.c M src/northbridge/intel/pineview/memmap.c M src/northbridge/intel/x4x/memmap.c 9 files changed, 15 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/43947/1
diff --git a/src/northbridge/amd/agesa/dimmSpd.h b/src/northbridge/amd/agesa/dimmSpd.h index dbcb106..aaa3ced 100644 --- a/src/northbridge/amd/agesa/dimmSpd.h +++ b/src/northbridge/amd/agesa/dimmSpd.h @@ -3,6 +3,8 @@ #ifndef _DIMMSPD_H_ #define _DIMMSPD_H_
+#include <stddef.h> + AGESA_STATUS AmdMemoryReadSPD (IN UINT32 Func, IN UINTN Data, IN OUT AGESA_READ_SPD_PARAMS *SpdData);
diff --git a/src/northbridge/amd/pi/dimmSpd.h b/src/northbridge/amd/pi/dimmSpd.h index dbcb106..aaa3ced 100644 --- a/src/northbridge/amd/pi/dimmSpd.h +++ b/src/northbridge/amd/pi/dimmSpd.h @@ -3,6 +3,8 @@ #ifndef _DIMMSPD_H_ #define _DIMMSPD_H_
+#include <stddef.h> + AGESA_STATUS AmdMemoryReadSPD (IN UINT32 Func, IN UINTN Data, IN OUT AGESA_READ_SPD_PARAMS *SpdData);
diff --git a/src/northbridge/intel/gm45/memmap.c b/src/northbridge/intel/gm45/memmap.c index 4fe3998..cafdb46 100644 --- a/src/northbridge/intel/gm45/memmap.c +++ b/src/northbridge/intel/gm45/memmap.c @@ -14,6 +14,7 @@ #include <program_loading.h> #include <cpu/intel/smm_reloc.h> #include "gm45.h" +#include <stddef.h>
/* * Decodes used Graphics Mode Select (GMS) to kilobytes. diff --git a/src/northbridge/intel/haswell/memmap.c b/src/northbridge/intel/haswell/memmap.c index a86efeb..368fbb3 100644 --- a/src/northbridge/intel/haswell/memmap.c +++ b/src/northbridge/intel/haswell/memmap.c @@ -9,6 +9,9 @@ #include <cpu/x86/smm.h> #include <device/pci_ops.h> #include <cbmem.h> +#include <stddef.h> +#include <stdint.h> + #include "haswell.h"
static uintptr_t smm_region_start(void) diff --git a/src/northbridge/intel/haswell/northbridge.c b/src/northbridge/intel/haswell/northbridge.c index ef7742e..864cd83 100644 --- a/src/northbridge/intel/haswell/northbridge.c +++ b/src/northbridge/intel/haswell/northbridge.c @@ -3,7 +3,6 @@ #include <commonlib/helpers.h> #include <console/console.h> #include <acpi/acpi.h> -#include <stdint.h> #include <delay.h> #include <cpu/intel/haswell/haswell.h> #include <device/device.h> @@ -12,6 +11,7 @@ #include <device/pci_ids.h> #include <device/pci_ops.h> #include <boot/tables.h> +#include <types.h>
#include "chip.h" #include "haswell.h" diff --git a/src/northbridge/intel/i945/memmap.c b/src/northbridge/intel/i945/memmap.c index c92e466..4961d28 100644 --- a/src/northbridge/intel/i945/memmap.c +++ b/src/northbridge/intel/i945/memmap.c @@ -12,6 +12,7 @@ #include <cpu/x86/smm.h> #include <program_loading.h> #include <cpu/intel/smm_reloc.h> +#include <stddef.h> #include <stdint.h>
/* Decodes TSEG region size to bytes. */ diff --git a/src/northbridge/intel/ironlake/memmap.c b/src/northbridge/intel/ironlake/memmap.c index 406b9a9..9d991bc 100644 --- a/src/northbridge/intel/ironlake/memmap.c +++ b/src/northbridge/intel/ironlake/memmap.c @@ -9,6 +9,9 @@ #include <cpu/x86/smm.h> #include <program_loading.h> #include <cpu/intel/smm_reloc.h> +#include <stddef.h> +#include <stdint.h> + #include "ironlake.h"
static uintptr_t smm_region_start(void) diff --git a/src/northbridge/intel/pineview/memmap.c b/src/northbridge/intel/pineview/memmap.c index ad89aef..bf9ebc6b 100644 --- a/src/northbridge/intel/pineview/memmap.c +++ b/src/northbridge/intel/pineview/memmap.c @@ -12,6 +12,7 @@ #include <cpu/x86/mtrr.h> #include <cpu/x86/smm.h> #include <cpu/intel/smm_reloc.h> +#include <stddef.h> #include <stdint.h>
u8 decode_pciebar(u32 *const base, u32 *const len) diff --git a/src/northbridge/intel/x4x/memmap.c b/src/northbridge/intel/x4x/memmap.c index ee1ec5e..97abafc 100644 --- a/src/northbridge/intel/x4x/memmap.c +++ b/src/northbridge/intel/x4x/memmap.c @@ -14,6 +14,7 @@ #include <northbridge/intel/x4x/x4x.h> #include <program_loading.h> #include <cpu/intel/smm_reloc.h> +#include <stddef.h>
/** Decodes used Graphics Mode Select (GMS) to kilobytes. */ u32 decode_igd_memory_size(const u32 gms)
Hello build bot (Jenkins), Damien Zammit, Angel Pons, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/43947
to look at the new patch set (#2).
Change subject: src/northbridge: Add missing <{stddef,stdint}|types> ......................................................................
src/northbridge: Add missing <{stddef,stdint}|types>
Include <types.h> when stddef, stdint and stdbool are needed.
Change-Id: I3d189080b770afa5e5478e4908b3340227948498 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/amd/agesa/dimmSpd.h M src/northbridge/amd/pi/dimmSpd.h M src/northbridge/intel/gm45/memmap.c M src/northbridge/intel/haswell/memmap.c M src/northbridge/intel/haswell/northbridge.c M src/northbridge/intel/i945/memmap.c M src/northbridge/intel/ironlake/memmap.c M src/northbridge/intel/pineview/memmap.c M src/northbridge/intel/x4x/memmap.c 9 files changed, 15 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/43947/2
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43947 )
Change subject: src/northbridge: Add missing <{stddef,stdint}|types> ......................................................................
Patch Set 2: Code-Review+1
Hello build bot (Jenkins), Damien Zammit, Angel Pons, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/43947
to look at the new patch set (#3).
Change subject: src/northbridge: Add missing <{stddef,stdint}|types> ......................................................................
src/northbridge: Add missing <{stddef,stdint}|types>
Include <types.h> when stddef, stdint and stdbool are needed.
Change-Id: I3d189080b770afa5e5478e4908b3340227948498 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/amd/agesa/dimmSpd.h M src/northbridge/amd/pi/dimmSpd.h M src/northbridge/intel/gm45/memmap.c M src/northbridge/intel/haswell/memmap.c M src/northbridge/intel/haswell/northbridge.c M src/northbridge/intel/i945/memmap.c M src/northbridge/intel/ironlake/memmap.c M src/northbridge/intel/pineview/memmap.c M src/northbridge/intel/x4x/memmap.c 9 files changed, 13 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/43947/3
HAOUAS Elyes has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/43947 )
Change subject: src/northbridge: Add missing <{stddef,stdint}|types> ......................................................................
Abandoned
-
Angel Pons (Code Review) -
HAOUAS Elyes (Code Review)