Change in coreboot[master]: {mb, soc}: Move mrc_cache invalidating logic into `memory` common code

[Subrata Banik (Code Review)]

Attention is currently required from: Tim Wawrzynczak, Nick Vaccaro, Patrick Rudolph, Zhuohao Lee.
Hello Tim Wawrzynczak, Nick Vaccaro, Eric Lai, Patrick Rudolph, Zhuohao Lee,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/62738

to look at the new patch set (#3).

Change subject: {mb, soc}: Move mrc_cache invalidating logic into `memory` common code
......................................................................

{mb, soc}: Move mrc_cache invalidating logic into `memory` common code

Commit hash b8b40964 ( mb, soc: Add the SPD_CACHE_ENABLE) introduced
per mainboard logic to invalidate the mrc_cache.

This patch moves mrc_cache invalidating logic into IA common code and
cleans up the code to remove unused argument `dimms_changed` from SoC
and mainboard directory.

BUG=b:200243989
BRANCH=firmware-brya-14505.B
TEST=Able to build and boot redrix without any visible failure/errors.

Signed-off-by: Subrata Banik 
Change-Id: I6f18e18adc6572571871dd6da1698186e4e3d671
---
M src/mainboard/google/brya/romstage.c
M src/mainboard/intel/adlrvp/romstage_fsp_params.c
M src/mainboard/intel/shadowmountain/romstage.c
M src/mainboard/prodrive/atlas/romstage_fsp_params.c
M src/soc/intel/alderlake/include/soc/meminit.h
M src/soc/intel/alderlake/meminit.c
M src/soc/intel/common/block/include/intelblocks/meminit.h
M src/soc/intel/common/block/memory/meminit.c
M src/soc/intel/tigerlake/meminit.c
9 files changed, 18 insertions(+), 33 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/62738/3