Change in coreboot[master]: common/block/pcie/rtd3:[WIP] use the correct confing name for clkreq ...

[Rizwan Qureshi (Code Review)]

Attention is currently required from: Patrick Rudolph.
Rizwan Qureshi has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52194 )

Change subject: common/block/pcie/rtd3:[WIP] use the correct confing name for clkreq pin count
......................................................................

common/block/pcie/rtd3:[WIP] use the correct confing name for clkreq pin count

Signed-off-by: Rizwan Qureshi 
Change-Id: I747c94331b68c4ec0b6b5a04149856a4bb384829
---
M src/soc/intel/common/block/pcie/rtd3/rtd3.c
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/52194/1

diff --git a/src/soc/intel/common/block/pcie/rtd3/rtd3.c b/src/soc/intel/common/block/pcie/rtd3/rtd3.c
index 5a04333..1a56aac 100644
--- a/src/soc/intel/common/block/pcie/rtd3/rtd3.c
+++ b/src/soc/intel/common/block/pcie/rtd3/rtd3.c
@@ -200,7 +200,7 @@
    	       __func__, scope);
    	return;
    }
-	if (config->srcclk_pin > CONFIG_MAX_PCIE_CLOCKS) {
+	if (config->srcclk_pin > CONFIG_MAX_PCIE_CLOCK_REQ) {
    	printk(BIOS_ERR, "%s: Invalid clock pin %u for %s.\n", __func__,
    	       config->srcclk_pin, scope);
    	return;