Richard Spiegel has posted comments on this change. ( https://review.coreboot.org/28608 )
Change subject: amd/stoneyridge: Sync PSP base to MSR ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/28608/1/src/soc/amd/stoneyridge/cpu.c File src/soc/amd/stoneyridge/cpu.c:
https://review.coreboot.org/#/c/28608/1/src/soc/amd/stoneyridge/cpu.c@123 PS1, Line 123: setup_lapic();
It'd be nice to comment properly what's really needed. […]
Yes, I did tested it against S3 cycle and reboot. It's write once, it survives reboot and S3 cycle. Original Marshall's code caused errors both ways, reboot and S3 cycle. Once I added the protection, problem was gone. Also I tried without the code and using iotools to write it once... then it survived reboot and S3 cycle. Only S5 clears it!
Will add the comment.
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Richard Spiegel (Code Review)