Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44110 )
Change subject: soc/intel/apollolake/acpi.c: Add RMRRs after all DRHDs ......................................................................
soc/intel/apollolake/acpi.c: Add RMRRs after all DRHDs
The VT-d architecture specification (Doc. D51397-011, Rev. 3.1) says:
BIOS implementations must report these remapping structure types in numerical order. i.e., All remapping structures of type 0 (DRHD) enumerated before remapping structures of type 1 (RMRR), and so forth.
So, update the corresponding code to adhere to the specification.
Change-Id: I4ee3ae6c45e2a2c921fbccbb62b853e4a141a58d Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/soc/intel/apollolake/acpi.c 1 file changed, 13 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/44110/1
diff --git a/src/soc/intel/apollolake/acpi.c b/src/soc/intel/apollolake/acpi.c index 96a142a..ee1a543 100644 --- a/src/soc/intel/apollolake/acpi.c +++ b/src/soc/intel/apollolake/acpi.c @@ -171,19 +171,15 @@ unsigned long tmp;
/* IGD has to be enabled, GFXVTBAR set and enabled. */ - if (is_dev_enabled(igfx_dev) && gfxvtbar && gfxvten) { + const bool emit_igd = is_dev_enabled(igfx_dev) && gfxvtbar && gfxvten; + + /* First, add DRHD entries */ + if (emit_igd) { tmp = current;
current += acpi_create_dmar_drhd(current, 0, 0, gfxvtbar); current += acpi_create_dmar_ds_pci(current, 0, 2, 0); acpi_dmar_drhd_fixup(tmp, current); - - /* Add RMRR entry */ - tmp = current; - current += acpi_create_dmar_rmrr(current, 0, - sa_get_gsm_base(), sa_get_tolud_base() - 1); - current += acpi_create_dmar_ds_pci(current, 0, 2, 0); - acpi_dmar_rmrr_fixup(tmp, current); }
/* DEFVTBAR has to be set and enabled. */ @@ -210,6 +206,15 @@ acpi_dmar_drhd_fixup(tmp, current); }
+ /* Then, add RMRR entries after all DRHD entries */ + if (emit_igd) { + tmp = current; + current += acpi_create_dmar_rmrr(current, 0, + sa_get_gsm_base(), sa_get_tolud_base() - 1); + current += acpi_create_dmar_ds_pci(current, 0, 2, 0); + acpi_dmar_rmrr_fixup(tmp, current); + } + return current; }
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44110 )
Change subject: soc/intel/apollolake/acpi.c: Add RMRRs after all DRHDs ......................................................................
Patch Set 1: Code-Review+2
Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44110 )
Change subject: soc/intel/apollolake/acpi.c: Add RMRRs after all DRHDs ......................................................................
soc/intel/apollolake/acpi.c: Add RMRRs after all DRHDs
The VT-d architecture specification (Doc. D51397-011, Rev. 3.1) says:
BIOS implementations must report these remapping structure types in numerical order. i.e., All remapping structures of type 0 (DRHD) enumerated before remapping structures of type 1 (RMRR), and so forth.
So, update the corresponding code to adhere to the specification.
Change-Id: I4ee3ae6c45e2a2c921fbccbb62b853e4a141a58d Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/44110 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Patrick Rudolph siro@das-labor.org --- M src/soc/intel/apollolake/acpi.c 1 file changed, 13 insertions(+), 8 deletions(-)
Approvals: build bot (Jenkins): Verified Patrick Rudolph: Looks good to me, approved
diff --git a/src/soc/intel/apollolake/acpi.c b/src/soc/intel/apollolake/acpi.c index 96a142a..ee1a543 100644 --- a/src/soc/intel/apollolake/acpi.c +++ b/src/soc/intel/apollolake/acpi.c @@ -171,19 +171,15 @@ unsigned long tmp;
/* IGD has to be enabled, GFXVTBAR set and enabled. */ - if (is_dev_enabled(igfx_dev) && gfxvtbar && gfxvten) { + const bool emit_igd = is_dev_enabled(igfx_dev) && gfxvtbar && gfxvten; + + /* First, add DRHD entries */ + if (emit_igd) { tmp = current;
current += acpi_create_dmar_drhd(current, 0, 0, gfxvtbar); current += acpi_create_dmar_ds_pci(current, 0, 2, 0); acpi_dmar_drhd_fixup(tmp, current); - - /* Add RMRR entry */ - tmp = current; - current += acpi_create_dmar_rmrr(current, 0, - sa_get_gsm_base(), sa_get_tolud_base() - 1); - current += acpi_create_dmar_ds_pci(current, 0, 2, 0); - acpi_dmar_rmrr_fixup(tmp, current); }
/* DEFVTBAR has to be set and enabled. */ @@ -210,6 +206,15 @@ acpi_dmar_drhd_fixup(tmp, current); }
+ /* Then, add RMRR entries after all DRHD entries */ + if (emit_igd) { + tmp = current; + current += acpi_create_dmar_rmrr(current, 0, + sa_get_gsm_base(), sa_get_tolud_base() - 1); + current += acpi_create_dmar_ds_pci(current, 0, 2, 0); + acpi_dmar_rmrr_fixup(tmp, current); + } + return current; }
-
Angel Pons (Code Review) -
Patrick Rudolph (Code Review)