Attention is currently required from: Frans Hendriks, Wim Vervoorn. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52128 )
Change subject: mb/faceboot/fbg1701/romstage.c: Set disable_saved_data ......................................................................
Patch Set 2:
(5 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/52128/comment/bd8fec14_4f07921e PS2, Line 9: ASSERTION ERROR Can you point where the issue occurs?
https://review.coreboot.org/c/coreboot/+/52128/comment/ff27ad66_a1510846 PS2, Line 9: MRC MRC_CACHE?
https://review.coreboot.org/c/coreboot/+/52128/comment/80c83293_74626d05 PS2, Line 11: not not enough
https://review.coreboot.org/c/coreboot/+/52128/comment/1efefc4d_2223d602 PS2, Line 11: space CAR space
https://review.coreboot.org/c/coreboot/+/52128/comment/970e7ce0_e632d4ac PS2, Line 13: SPI is too small for _vboot2_work buffer. What does this mean?
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Arthur Heymans (Code Review)