Change in coreboot[master]: vendorcode/intel/fsp/tigerlake: Add tigerlake FSP header file template - coreboot-gerrit

31 Oct 2019


      Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36243 )
Change subject: vendorcode/intel/fsp/tigerlake: Add tigerlake FSP header file template
......................................................................
Patch Set 4:
...
Patch Set 4: Code-Review-1
As Intel doesn't clean up vendorcode once the development ended and files are available, Intel shouldn't be allowed to add more code here.
Not sure what you mean by clean up vendor code ? don't we have option to pick FSP header from open source git like WHL? we might only need to keep headers in vendorcode till the time we are in non released SOC in market.
-- 
To view, visit https://review.coreboot.org/c/coreboot/+/36243
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ia1d064ea60e3b7c2d1114771b07cf7ec7f0e2b37
Gerrit-Change-Number: 36243
Gerrit-PatchSet: 4
Gerrit-Owner: Ravishankar Sarawadi ravishankar.sarawadi@intel.com
Gerrit-Reviewer: Furquan Shaikh furquan@google.com
Gerrit-Reviewer: John Zhao john.zhao@intel.com
Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org
Gerrit-Reviewer: Raj Astekar raj.astekar@intel.com
Gerrit-Reviewer: Ravishankar Sarawadi ravishankar.sarawadi@intel.com
Gerrit-Reviewer: Subrata Banik subrata.banik@intel.com
Gerrit-Comment-Date: Thu, 31 Oct 2019 05:54:29 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: No
Gerrit-MessageType: comment