Uwe Poeche has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31344
Change subject: siemens/mc_apl4: Enable HW SPI TPM on mainboard mc_apl4 ......................................................................
siemens/mc_apl4: Enable HW SPI TPM on mainboard mc_apl4
This patch provides the necessary changes to get HW TPM working.
Change-Id: I9af7e1a8623302eca46f5ecd8e498678ccda92ad Signed-off-by: Uwe Poeche uwe.poeche@siemens.com --- M src/mainboard/siemens/mc_apl1/variants/mc_apl4/Kconfig M src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb 2 files changed, 9 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/31344/1
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/Kconfig b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/Kconfig index 247b052..060d695 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/Kconfig +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/Kconfig @@ -6,6 +6,9 @@ select DRIVER_INTEL_I210 select APL_SET_MIN_CLOCK_RATIO select DRIVERS_I2C_RX6110SA + select MAINBOARD_HAS_TPM2 + select MAINBOARD_HAS_LPC_TPM + select TPM_ON_FAST_SPI
config UART_FOR_CONSOLE default 1 diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb index 4928701..8aaf32e 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb @@ -102,7 +102,12 @@ device pci 1c.0 on end # - eMMC device pci 1d.0 off end # - UFS device pci 1e.0 off end # - SDIO - device pci 1f.0 on end # - LPC + device pci 1f.0 on # - LPC + chip drivers/pc80/tpm + device pnp 0c31.0 on end + end + end # - LPC device pci 1f.1 on end # - SMBUS end end +
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31344 )
Change subject: siemens/mc_apl4: Enable HW SPI TPM on mainboard mc_apl4 ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/#/c/31344/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/31344/1//COMMIT_MSG@9 PS1, Line 9: necessary changes Please describe those in the commit message, so that the diff and your description can be compared to spot possible errors.
https://review.coreboot.org/#/c/31344/1//COMMIT_MSG@10 PS1, Line 10: Tested how?
Mario Scheithauer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31344 )
Change subject: siemens/mc_apl4: Enable HW SPI TPM on mainboard mc_apl4 ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/#/c/31344/1/src/mainboard/siemens/mc_apl1/varian... File src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb:
https://review.coreboot.org/#/c/31344/1/src/mainboard/siemens/mc_apl1/varian... PS1, Line 109: LPC i think one comment at the beginning is enough
https://review.coreboot.org/#/c/31344/1/src/mainboard/siemens/mc_apl1/varian... PS1, Line 113: only one line at the end of this file
Hello Werner Zeh, Mario Scheithauer, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/31344
to look at the new patch set (#2).
Change subject: siemens/mc_apl4: Enable HW SPI TPM on mainboard mc_apl4 ......................................................................
siemens/mc_apl4: Enable HW SPI TPM on mainboard mc_apl4
This patch enables TPM2 on LPC and adds the needed devicetree entry for TPM for mc_apl4.
Test=mc_apl4 flashed, booted into Linux and checked via dmesg if TPM is present
Change-Id: I9af7e1a8623302eca46f5ecd8e498678ccda92ad Signed-off-by: Uwe Poeche uwe.poeche@siemens.com --- M src/mainboard/siemens/mc_apl1/variants/mc_apl4/Kconfig M src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb 2 files changed, 8 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/31344/2
Uwe Poeche has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31344 )
Change subject: siemens/mc_apl4: Enable HW SPI TPM on mainboard mc_apl4 ......................................................................
Patch Set 2:
(2 comments)
https://review.coreboot.org/#/c/31344/1/src/mainboard/siemens/mc_apl1/varian... File src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb:
https://review.coreboot.org/#/c/31344/1/src/mainboard/siemens/mc_apl1/varian... PS1, Line 109: LPC
i think one comment at the beginning is enough
Done
https://review.coreboot.org/#/c/31344/1/src/mainboard/siemens/mc_apl1/varian... PS1, Line 113:
only one line at the end of this file
Done
Uwe Poeche has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31344 )
Change subject: siemens/mc_apl4: Enable HW SPI TPM on mainboard mc_apl4 ......................................................................
Patch Set 2:
(2 comments)
https://review.coreboot.org/#/c/31344/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/31344/1//COMMIT_MSG@9 PS1, Line 9: necessary changes
Please describe those in the commit message, so that the diff and your description can be compared t […]
Done
https://review.coreboot.org/#/c/31344/1//COMMIT_MSG@10 PS1, Line 10:
Tested how?
Done
Mario Scheithauer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31344 )
Change subject: siemens/mc_apl4: Enable HW SPI TPM on mainboard mc_apl4 ......................................................................
Patch Set 2: Code-Review+2
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31344 )
Change subject: siemens/mc_apl4: Enable HW SPI TPM on mainboard mc_apl4 ......................................................................
Patch Set 2: Code-Review+1
Werner Zeh has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31344 )
Change subject: siemens/mc_apl4: Enable HW SPI TPM on mainboard mc_apl4 ......................................................................
siemens/mc_apl4: Enable HW SPI TPM on mainboard mc_apl4
This patch enables TPM2 on LPC and adds the needed devicetree entry for TPM for mc_apl4.
Test=mc_apl4 flashed, booted into Linux and checked via dmesg if TPM is present
Change-Id: I9af7e1a8623302eca46f5ecd8e498678ccda92ad Signed-off-by: Uwe Poeche uwe.poeche@siemens.com Reviewed-on: https://review.coreboot.org/c/31344 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Mario Scheithauer mario.scheithauer@siemens.com Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net --- M src/mainboard/siemens/mc_apl1/variants/mc_apl4/Kconfig M src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb 2 files changed, 8 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Mario Scheithauer: Looks good to me, approved
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/Kconfig b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/Kconfig index 247b052..060d695 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/Kconfig +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/Kconfig @@ -6,6 +6,9 @@ select DRIVER_INTEL_I210 select APL_SET_MIN_CLOCK_RATIO select DRIVERS_I2C_RX6110SA + select MAINBOARD_HAS_TPM2 + select MAINBOARD_HAS_LPC_TPM + select TPM_ON_FAST_SPI
config UART_FOR_CONSOLE default 1 diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb index 4928701..e6feb48 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb @@ -102,7 +102,11 @@ device pci 1c.0 on end # - eMMC device pci 1d.0 off end # - UFS device pci 1e.0 off end # - SDIO - device pci 1f.0 on end # - LPC + device pci 1f.0 on # - LPC + chip drivers/pc80/tpm + device pnp 0c31.0 on end + end + end device pci 1f.1 on end # - SMBUS end end
-
Mario Scheithauer (Code Review) -
Paul Menzel (Code Review)
-
Uwe Poeche (Code Review)
-
Werner Zeh (Code Review)