Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38491 )
Change subject: mainboard/hatch: Fix GPE wake comments ......................................................................
mainboard/hatch: Fix GPE wake comments
The indirection of names is exceedingly confusing for ultimately the single interrupt trace of EC_PCH_WAKE_ODL between the EC gpio#74 to GPD2/LAN_WAKE# on the PCH side.
This helps folks chase this indirection down though the code.
BUG=b:147026979 BRANCH=none TEST=builds
Change-Id: I35d746a202dae06d2f6f1edfaa3889864b09f50d Signed-off-by: Edward O'Callaghan quasisec@google.com --- M src/mainboard/google/hatch/variants/baseboard/gpio.c M src/mainboard/google/hatch/variants/baseboard/include/baseboard/gpio.h M src/mainboard/google/hatch/variants/puff/include/variant/ec.h 3 files changed, 8 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/38491/1
diff --git a/src/mainboard/google/hatch/variants/baseboard/gpio.c b/src/mainboard/google/hatch/variants/baseboard/gpio.c index dcd987f..527bf93 100644 --- a/src/mainboard/google/hatch/variants/baseboard/gpio.c +++ b/src/mainboard/google/hatch/variants/baseboard/gpio.c @@ -377,7 +377,7 @@ /* H23 : GPP_H23_STRAP */ PAD_NC(GPP_H23, NONE),
- /* GPD2: LAN_WAKE# ==> EC_PCH_WAKE_OD */ + /* GPD2: LAN_WAKE# ==> EC_PCH_WAKE_ODL */ PAD_CFG_NF(GPD2, NONE, DEEP, NF1),
/* SD card detect VGPIO */ diff --git a/src/mainboard/google/hatch/variants/baseboard/include/baseboard/gpio.h b/src/mainboard/google/hatch/variants/baseboard/include/baseboard/gpio.h index e83732c..7bdd912 100644 --- a/src/mainboard/google/hatch/variants/baseboard/include/baseboard/gpio.h +++ b/src/mainboard/google/hatch/variants/baseboard/include/baseboard/gpio.h @@ -22,7 +22,7 @@
#define GPIO_PCH_WP GPP_C20
-/* EC wake pin is LAN_WAKE# */ +/* EC wake pin is routed to GPD2/LAN_WAKE# on PCH */ #define GPE_EC_WAKE GPE0_LAN_WAK
/* eSPI virtual wire reporting */ diff --git a/src/mainboard/google/hatch/variants/puff/include/variant/ec.h b/src/mainboard/google/hatch/variants/puff/include/variant/ec.h index 501fab0..34641c0 100644 --- a/src/mainboard/google/hatch/variants/puff/include/variant/ec.h +++ b/src/mainboard/google/hatch/variants/puff/include/variant/ec.h @@ -54,7 +54,12 @@ /* Enable EC backed PD MCU device in ACPI */ #define EC_ENABLE_PD_MCU_DEVICE
-/* Provide wake pin for EC for _PRW WoL method */ +/** + * Defines EC wake pin route for the _PRW WoL method. + * Note that GPE_EC_WAKE is defined, confusingly, as + * GPE_LAN_WAK which is GPD2/LAN_WAKE# on the PCH or + * as the line EC_PCH_WAKE_ODL on the schematic. + */ #define EC_ENABLE_WAKE_PIN GPE_EC_WAKE
#define SIO_EC_MEMMAP_ENABLE /* EC Memory Map Resources */
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38491 )
Change subject: mainboard/hatch: Fix GPE wake comments ......................................................................
Patch Set 1:
(4 comments)
https://review.coreboot.org/c/coreboot/+/38491/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/38491/1//COMMIT_MSG@14 PS1, Line 14: though through
https://review.coreboot.org/c/coreboot/+/38491/1//COMMIT_MSG@9 PS1, Line 9: The indirection of names is exceedingly confusing : for ultimately the single interrupt trace of : EC_PCH_WAKE_ODL between the EC gpio#74 to : GPD2/LAN_WAKE# on the PCH side. : : This helps folks chase this indirection down though : the code. Please reflow for 75 characters.
https://review.coreboot.org/c/coreboot/+/38491/1/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/puff/include/variant/ec.h:
https://review.coreboot.org/c/coreboot/+/38491/1/src/mainboard/google/hatch/... PS1, Line 57: /** /*
https://review.coreboot.org/c/coreboot/+/38491/1/src/mainboard/google/hatch/... PS1, Line 61: * as the line EC_PCH_WAKE_ODL on the schematic. Please use 96 characters text width.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38491 )
Change subject: mainboard/hatch: Fix GPE wake comments ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38491/1/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/puff/include/variant/ec.h:
https://review.coreboot.org/c/coreboot/+/38491/1/src/mainboard/google/hatch/... PS1, Line 58: EC wake pin route for the _PRW WoL method. I don't understand this comment. Why is EC wake pin used for Wake on LAN method?
Hello Daniel Kurtz, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/38491
to look at the new patch set (#2).
Change subject: mainboard/hatch: Fix GPE wake comments ......................................................................
mainboard/hatch: Fix GPE wake comments
The indirection of names is exceedingly confusing for ultimately the single interrupt trace of EC_PCH_WAKE_ODL between the EC gpio#74 to GPD2/LAN_WAKE# on the PCH side.
This helps folks chase this indirection down though the code.
BUG=b:147026979 BRANCH=none TEST=builds
Change-Id: I35d746a202dae06d2f6f1edfaa3889864b09f50d Signed-off-by: Edward O'Callaghan quasisec@google.com --- M src/mainboard/google/hatch/variants/baseboard/gpio.c M src/mainboard/google/hatch/variants/baseboard/include/baseboard/gpio.h M src/mainboard/google/hatch/variants/puff/include/variant/ec.h 3 files changed, 8 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/38491/2
Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38491 )
Change subject: mainboard/hatch: Fix GPE wake comments ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38491/1/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/puff/include/variant/ec.h:
https://review.coreboot.org/c/coreboot/+/38491/1/src/mainboard/google/hatch/... PS1, Line 58: EC wake pin route for the _PRW WoL method.
I don't understand this comment. […]
It doesn't that's another bit of confusion. I fixed that now as well.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38491 )
Change subject: mainboard/hatch: Fix GPE wake comments ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38491/2/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/puff/include/variant/ec.h:
https://review.coreboot.org/c/coreboot/+/38491/2/src/mainboard/google/hatch/... PS2, Line 59: confusingly, as : * GPE_LAN_WAK Why do you say confusingly? EC_PCH_WAKE_ODL is routed to GPD2/LAN_WAKE# on the PCH as you said. This is done intentionally for a few reasons: --> This is a special pin which can be used to wake even from deep sleep states. --> WAKE# pin doesn't really work for wake from S0ix and so starting with KBL we switched to using LAN_WAKE# instead for routing the EC wake line.
Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38491 )
Change subject: mainboard/hatch: Fix GPE wake comments ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38491/2/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/puff/include/variant/ec.h:
https://review.coreboot.org/c/coreboot/+/38491/2/src/mainboard/google/hatch/... PS2, Line 59: confusingly, as : * GPE_LAN_WAK
Why do you say confusingly? EC_PCH_WAKE_ODL is routed to GPD2/LAN_WAKE# on the PCH as you said. […]
I know. I mean it is confusing if someone who didn't write/read the schematic that some pin is called "LAN_SOMETHING" however doesn't go to the lan. This is just meant to delineate the names a little ;)
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38491 )
Change subject: mainboard/hatch: Fix GPE wake comments ......................................................................
Patch Set 3: Code-Review+2
Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38491 )
Change subject: mainboard/hatch: Fix GPE wake comments ......................................................................
Patch Set 3:
(1 comment)
a few review comments aren't handled yet, blocking a merge.
https://review.coreboot.org/c/coreboot/+/38491/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/38491/1//COMMIT_MSG@9 PS1, Line 9: The indirection of names is exceedingly confusing : for ultimately the single interrupt trace of : EC_PCH_WAKE_ODL between the EC gpio#74 to : GPD2/LAN_WAKE# on the PCH side. : : This helps folks chase this indirection down though : the code.
Please reflow for 75 characters.
Done
Patrick Georgi has uploaded a new patch set (#4) to the change originally created by Edward O'Callaghan. ( https://review.coreboot.org/c/coreboot/+/38491 )
Change subject: mainboard/hatch: Fix GPE wake comments ......................................................................
mainboard/hatch: Fix GPE wake comments
The indirection of names is exceedingly confusing for ultimately the single interrupt trace of EC_PCH_WAKE_ODL between the EC gpio#74 to GPD2/LAN_WAKE# on the PCH side.
This helps folks chase this indirection down through the code.
BUG=b:147026979 BRANCH=none TEST=builds
Change-Id: I35d746a202dae06d2f6f1edfaa3889864b09f50d Signed-off-by: Edward O'Callaghan quasisec@google.com --- M src/mainboard/google/hatch/variants/baseboard/gpio.c M src/mainboard/google/hatch/variants/baseboard/include/baseboard/gpio.h M src/mainboard/google/hatch/variants/puff/include/variant/ec.h 3 files changed, 8 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/38491/4
Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38491 )
Change subject: mainboard/hatch: Fix GPE wake comments ......................................................................
Patch Set 4:
(3 comments)
https://review.coreboot.org/c/coreboot/+/38491/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/38491/1//COMMIT_MSG@14 PS1, Line 14: though
through
Done
https://review.coreboot.org/c/coreboot/+/38491/1/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/puff/include/variant/ec.h:
https://review.coreboot.org/c/coreboot/+/38491/1/src/mainboard/google/hatch/... PS1, Line 57: /**
/*
See https://review.coreboot.org/c/coreboot/+/39118
https://review.coreboot.org/c/coreboot/+/38491/1/src/mainboard/google/hatch/... PS1, Line 61: * as the line EC_PCH_WAKE_ODL on the schematic.
Please use 96 characters text width.
See https://review.coreboot.org/c/coreboot/+/39118
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38491 )
Change subject: mainboard/hatch: Fix GPE wake comments ......................................................................
Patch Set 5: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38491 )
Change subject: mainboard/hatch: Fix GPE wake comments ......................................................................
mainboard/hatch: Fix GPE wake comments
The indirection of names is exceedingly confusing for ultimately the single interrupt trace of EC_PCH_WAKE_ODL between the EC gpio#74 to GPD2/LAN_WAKE# on the PCH side.
This helps folks chase this indirection down through the code.
BUG=b:147026979 BRANCH=none TEST=builds
Change-Id: I35d746a202dae06d2f6f1edfaa3889864b09f50d Signed-off-by: Edward O'Callaghan quasisec@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/38491 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Furquan Shaikh furquan@google.com --- M src/mainboard/google/hatch/variants/baseboard/gpio.c M src/mainboard/google/hatch/variants/baseboard/include/baseboard/gpio.h M src/mainboard/google/hatch/variants/puff/include/variant/ec.h 3 files changed, 8 insertions(+), 3 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved
diff --git a/src/mainboard/google/hatch/variants/baseboard/gpio.c b/src/mainboard/google/hatch/variants/baseboard/gpio.c index dcd987f..527bf93 100644 --- a/src/mainboard/google/hatch/variants/baseboard/gpio.c +++ b/src/mainboard/google/hatch/variants/baseboard/gpio.c @@ -377,7 +377,7 @@ /* H23 : GPP_H23_STRAP */ PAD_NC(GPP_H23, NONE),
- /* GPD2: LAN_WAKE# ==> EC_PCH_WAKE_OD */ + /* GPD2: LAN_WAKE# ==> EC_PCH_WAKE_ODL */ PAD_CFG_NF(GPD2, NONE, DEEP, NF1),
/* SD card detect VGPIO */ diff --git a/src/mainboard/google/hatch/variants/baseboard/include/baseboard/gpio.h b/src/mainboard/google/hatch/variants/baseboard/include/baseboard/gpio.h index e83732c..7bdd912 100644 --- a/src/mainboard/google/hatch/variants/baseboard/include/baseboard/gpio.h +++ b/src/mainboard/google/hatch/variants/baseboard/include/baseboard/gpio.h @@ -22,7 +22,7 @@
#define GPIO_PCH_WP GPP_C20
-/* EC wake pin is LAN_WAKE# */ +/* EC wake pin is routed to GPD2/LAN_WAKE# on PCH */ #define GPE_EC_WAKE GPE0_LAN_WAK
/* eSPI virtual wire reporting */ diff --git a/src/mainboard/google/hatch/variants/puff/include/variant/ec.h b/src/mainboard/google/hatch/variants/puff/include/variant/ec.h index 501fab0..1283763 100644 --- a/src/mainboard/google/hatch/variants/puff/include/variant/ec.h +++ b/src/mainboard/google/hatch/variants/puff/include/variant/ec.h @@ -54,7 +54,12 @@ /* Enable EC backed PD MCU device in ACPI */ #define EC_ENABLE_PD_MCU_DEVICE
-/* Provide wake pin for EC for _PRW WoL method */ +/** + * Defines EC wake pin route. + * Note that GPE_EC_WAKE is defined, confusingly, as + * GPE_LAN_WAK which is GPD2/LAN_WAKE# on the PCH or + * as the line EC_PCH_WAKE_ODL on the schematic. + */ #define EC_ENABLE_WAKE_PIN GPE_EC_WAKE
#define SIO_EC_MEMMAP_ENABLE /* EC Memory Map Resources */