[S] Change in coreboot[master]: soc/intel/alderlake: Disable C1E on RPL CPUs

[Joey Peng (Code Review)]

Attention is currently required from: YH Lin, Tarun Tuli, Subrata Banik, Paul Menzel, Nick Vaccaro.

Hello build bot (Jenkins), YH Lin, Tarun Tuli, Subrata Banik, Nick Vaccaro, Eric Lai,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/74727

to look at the new patch set (#11).

Change subject: soc/intel/alderlake: Disable C1E on RPL CPUs
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soc/intel/alderlake: Disable C1E on RPL CPUs

Since disabling C1E could improve acoustic noise for RPL, add judgement
in SOC code to disable C1E on RPL CPUs and enabling it on ADL CPUs .

BUG=b:278654939
TEST:emerge-brya coreboot

Signed-off-by: Joey Peng 
Change-Id: Ic2d2d5d6075de25141c1d08ec18838731c63a342
---
M src/soc/intel/alderlake/fsp_params.c
1 file changed, 21 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/74727/11