Change in coreboot[master]: soc/amd/picasso: introduce and use chipset device tree

[Felix Held (Code Review)]

Attention is currently required from: Jason Glenesk, Furquan Shaikh, Marshall Dawson.
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50626 )

Change subject: soc/amd/picasso: introduce and use chipset device tree
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Patch Set 6:

(1 comment)

File src/soc/amd/picasso/chipset.cb:

https://review.coreboot.org/c/coreboot/+/50626/comment/00e4499f_229cd556 
PS6, Line 18: on
> I think I would leave these off by default.

i strongly disagree on this, since this device needs to be enabled in order for internal_bridge_a and internal_bridge_b to work. when function 0 of a pcie device is disabled, all other functions are assumed to be disabled too. same argument for device pci 01.0 above.
checked with the cezanne chipset devicetree and device pci 08.0 is also enabled there