Roja Rani Yarubandi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35499 )
Change subject: sc7180: Add QUPv3 FW load & config
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Patch Set 44:
(1 comment)
https://review.coreboot.org/c/coreboot/+/35499/40/src/soc/qualcomm/sc7180/qu...
File src/soc/qualcomm/sc7180/qupv3_config.c:
https://review.coreboot.org/c/coreboot/+/35499/40/src/soc/qualcomm/sc7180/qu...
PS40, Line 75: /* To maintain Div=4 for QcLib, configure clock to 7372800Hz for sc7180 */
Checking with QcLib team
UART driver can derive 115200 baud from any of the frequencies maintained by QUP clock table, usually from low to high. Here, as we are able to achieve 115200 baud from 7372800Hz frequency, so hope this is fine and no need of any fix from QcLib.
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