Mike Banon has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33918
Change subject: src/mainboard/asus/am1i-a/buildOpts.c: uncomment the RAM speed-related defines ......................................................................
src/mainboard/asus/am1i-a/buildOpts.c: uncomment the RAM speed-related defines
Not sure why they have been commented out. Bringing them back does not affect a system operation, and they may be useful later while fixing the low RAM speeds.
Signed-off-by: Mike Banon mikebdp2@gmail.com Change-Id: Ic0468d329c6efa9abffc8859a542aae0cf702863 --- M src/mainboard/asus/am1i-a/buildOpts.c 1 file changed, 25 insertions(+), 25 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/33918/1
diff --git a/src/mainboard/asus/am1i-a/buildOpts.c b/src/mainboard/asus/am1i-a/buildOpts.c index 643b306..cba0894 100644 --- a/src/mainboard/asus/am1i-a/buildOpts.c +++ b/src/mainboard/asus/am1i-a/buildOpts.c @@ -265,31 +265,31 @@ #define AGESA_VERSION_STRING {'V', '0', '.', '0', '.', '0', '.', '1', ' ', ' ', ' ', ' '}
/* MEMORY_BUS_SPEED */ -//#define DDR400_FREQUENCY 200 ///< DDR 400 -//#define DDR533_FREQUENCY 266 ///< DDR 533 -//#define DDR667_FREQUENCY 333 ///< DDR 667 -//#define DDR800_FREQUENCY 400 ///< DDR 800 -//#define DDR1066_FREQUENCY 533 ///< DDR 1066 -//#define DDR1333_FREQUENCY 667 ///< DDR 1333 -//#define DDR1600_FREQUENCY 800 ///< DDR 1600 -//#define DDR1866_FREQUENCY 933 ///< DDR 1866 -//#define DDR2100_FREQUENCY 1050 ///< DDR 2100 -//#define DDR2133_FREQUENCY 1066 ///< DDR 2133 -//#define DDR2400_FREQUENCY 1200 ///< DDR 2400 -//#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency -// -///* QUANDRANK_TYPE*/ -//#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM -//#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM -// -///* USER_MEMORY_TIMING_MODE */ -//#define TIMING_MODE_AUTO 0 ///< Use best rate possible -//#define TIMING_MODE_LIMITED 1 ///< Set user top limit -//#define TIMING_MODE_SPECIFIC 2 ///< Set user specified speed -// -///* POWER_DOWN_MODE */ -//#define POWER_DOWN_BY_CHANNEL 0 ///< Channel power down mode -//#define POWER_DOWN_BY_CHIP_SELECT 1 ///< Chip select power down mode +#define DDR400_FREQUENCY 200 ///< DDR 400 +#define DDR533_FREQUENCY 266 ///< DDR 533 +#define DDR667_FREQUENCY 333 ///< DDR 667 +#define DDR800_FREQUENCY 400 ///< DDR 800 +#define DDR1066_FREQUENCY 533 ///< DDR 1066 +#define DDR1333_FREQUENCY 667 ///< DDR 1333 +#define DDR1600_FREQUENCY 800 ///< DDR 1600 +#define DDR1866_FREQUENCY 933 ///< DDR 1866 +#define DDR2100_FREQUENCY 1050 ///< DDR 2100 +#define DDR2133_FREQUENCY 1066 ///< DDR 2133 +#define DDR2400_FREQUENCY 1200 ///< DDR 2400 +#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency + +/* QUANDRANK_TYPE*/ +#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM +#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM + +/* USER_MEMORY_TIMING_MODE */ +#define TIMING_MODE_AUTO 0 ///< Use best rate possible +#define TIMING_MODE_LIMITED 1 ///< Set user top limit +#define TIMING_MODE_SPECIFIC 2 ///< Set user specified speed + +/* POWER_DOWN_MODE */ +#define POWER_DOWN_BY_CHANNEL 0 ///< Channel power down mode +#define POWER_DOWN_BY_CHIP_SELECT 1 ///< Chip select power down mode
/* * Agesa optional capabilities selection.
Mike Banon has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33918 )
Change subject: src/mainboard/asus/am1i-a/buildOpts.c: uncomment the RAM speed-related defines ......................................................................
Patch Set 1:
am1i-a/buildOpts.c patch series [6/8] : 1st = CB:33913 , 2nd = CB:33914 , 3rd = CB:33915 , 4th = CB:33916 , 5th = CB:33917 ; 6th = CB:33918 <-- you are here ; 7th = CB:33919 , 8th = CB:33920
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33918 )
Change subject: src/mainboard/asus/am1i-a/buildOpts.c: uncomment the RAM speed-related defines ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/33918/1/src/mainboard/asus/am1i-a/buildOpts.... File src/mainboard/asus/am1i-a/buildOpts.c:
https://review.coreboot.org/#/c/33918/1/src/mainboard/asus/am1i-a/buildOpts.... PS1, Line 268: #define DDR400_FREQUENCY 200 ///< DDR 400 : #define DDR533_FREQUENCY 266 ///< DDR 533 : #define DDR667_FREQUENCY 333 ///< DDR 667 : #define DDR800_FREQUENCY 400 ///< DDR 800 : #define DDR1066_FREQUENCY 533 ///< DDR 1066 : #define DDR1333_FREQUENCY 667 ///< DDR 1333 : #define DDR1600_FREQUENCY 800 ///< DDR 1600 : #define DDR1866_FREQUENCY 933 ///< DDR 1866 : #define DDR2100_FREQUENCY 1050 ///< DDR 2100 : #define DDR2133_FREQUENCY 1066 ///< DDR 2133 : #define DDR2400_FREQUENCY 1200 ///< DDR 2400 : #define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency : : /* QUANDRANK_TYPE*/ : #define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM : #define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM : : /* USER_MEMORY_TIMING_MODE */ : #define TIMING_MODE_AUTO 0 ///< Use best rate possible : #define TIMING_MODE_LIMITED 1 ///< Set user top limit : #define TIMING_MODE_SPECIFIC 2 ///< Set user specified speed : : /* POWER_DOWN_MODE */ : #define POWER_DOWN_BY_CHANNEL 0 ///< Channel power down mode : #define POWER_DOWN_BY_CHIP_SELECT 1 ///< Chip select power down mode : see src/vendorcode/amd/agesa/f16kb/AGESA.h already included
Mike Banon has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33918 )
Change subject: src/mainboard/asus/am1i-a/buildOpts.c: uncomment the RAM speed-related defines ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/33918/1/src/mainboard/asus/am1i-a/buildOpts.... File src/mainboard/asus/am1i-a/buildOpts.c:
https://review.coreboot.org/#/c/33918/1/src/mainboard/asus/am1i-a/buildOpts.... PS1, Line 268: #define DDR400_FREQUENCY 200 ///< DDR 400 : #define DDR533_FREQUENCY 266 ///< DDR 533 : #define DDR667_FREQUENCY 333 ///< DDR 667 : #define DDR800_FREQUENCY 400 ///< DDR 800 : #define DDR1066_FREQUENCY 533 ///< DDR 1066 : #define DDR1333_FREQUENCY 667 ///< DDR 1333 : #define DDR1600_FREQUENCY 800 ///< DDR 1600 : #define DDR1866_FREQUENCY 933 ///< DDR 1866 : #define DDR2100_FREQUENCY 1050 ///< DDR 2100 : #define DDR2133_FREQUENCY 1066 ///< DDR 2133 : #define DDR2400_FREQUENCY 1200 ///< DDR 2400 : #define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency : : /* QUANDRANK_TYPE*/ : #define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM : #define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM : : /* USER_MEMORY_TIMING_MODE */ : #define TIMING_MODE_AUTO 0 ///< Use best rate possible : #define TIMING_MODE_LIMITED 1 ///< Set user top limit : #define TIMING_MODE_SPECIFIC 2 ///< Set user specified speed : : /* POWER_DOWN_MODE */ : #define POWER_DOWN_BY_CHANNEL 0 ///< Channel power down mode : #define POWER_DOWN_BY_CHIP_SELECT 1 ///< Chip select power down mode :
see src/vendorcode/amd/agesa/f16kb/AGESA. […]
Okay, perhaps this commit is not needed then. Abandoning...
Mike Banon has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/33918 )
Change subject: src/mainboard/asus/am1i-a/buildOpts.c: uncomment the RAM speed-related defines ......................................................................
Abandoned
Not needed
Mike Banon has restored this change. ( https://review.coreboot.org/c/coreboot/+/33918 )
Change subject: src/mainboard/asus/am1i-a/buildOpts.c: uncomment the RAM speed-related defines ......................................................................
Restored
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33918
to look at the new patch set (#6).
Change subject: mb/asus/am1i-a/buildOpts.c: uncomment the RAM speed-related defines ......................................................................
mb/asus/am1i-a/buildOpts.c: uncomment the RAM speed-related defines
Not sure why they have been commented out. Bringing them back does not affect a system operation, and they may be useful later while fixing the low RAM speeds.
Signed-off-by: Mike Banon mikebdp2@gmail.com Change-Id: Ic0468d329c6efa9abffc8859a542aae0cf702863 --- M src/mainboard/asus/am1i-a/buildOpts.c 1 file changed, 25 insertions(+), 25 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/33918/6
Mike Banon has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33918 )
Change subject: mb/asus/am1i-a/buildOpts.c: uncomment the RAM speed-related defines ......................................................................
Patch Set 6:
Same SHA256 when built with "make BUILD_TIMELESS=1" - probably because these defines haven't been used yet?
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33918 )
Change subject: mb/asus/am1i-a/buildOpts.c: uncomment the RAM speed-related defines ......................................................................
Patch Set 6:
Patch Set 6:
Same SHA256 when built with "make BUILD_TIMELESS=1" - probably because these defines haven't been used yet?
They are very likely unused. If you don't plan on using them, you might as well delete them
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33918
to look at the new patch set (#8).
Change subject: mb/asus/am1i-a/buildOpts.c: uncomment the RAM speed-related defines ......................................................................
mb/asus/am1i-a/buildOpts.c: uncomment the RAM speed-related defines
Not sure why they have been commented out. Bringing them back does not affect a system operation, and they may be useful later while fixing the low RAM speeds. Tested with BUILD_TIMELESS=1, hashes do not change.
Signed-off-by: Mike Banon mikebdp2@gmail.com Change-Id: Ic0468d329c6efa9abffc8859a542aae0cf702863 --- M src/mainboard/asus/am1i-a/buildOpts.c 1 file changed, 25 insertions(+), 25 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/33918/8
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33918 )
Change subject: mb/asus/am1i-a/buildOpts.c: uncomment the RAM speed-related defines ......................................................................
Patch Set 8:
why? all of them are not used
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33918 )
Change subject: mb/asus/am1i-a/buildOpts.c: uncomment the RAM speed-related defines ......................................................................
Patch Set 8: Code-Review-1
(1 comment)
https://review.coreboot.org/c/coreboot/+/33918/8/src/mainboard/asus/am1i-a/b... File src/mainboard/asus/am1i-a/buildOpts.c:
https://review.coreboot.org/c/coreboot/+/33918/8/src/mainboard/asus/am1i-a/b... PS8, Line 254: /* MEMORY_BUS_SPEED */ Nothing will use these, and they seem to be defined elsewhere. Please remove them.
Mike Banon has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/33918 )
Change subject: mb/asus/am1i-a/buildOpts.c: uncomment the RAM speed-related defines ......................................................................
Abandoned
These RAM speed-related defines are unused and not needed.