Change in ...coreboot[master]: {drivers,soc/intel/braswell}: Add C_ENVIRONMENT_BOOTBLOCK support
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29662 )
Change subject: {drivers,soc/intel/braswell}: Add C_ENVIRONMENT_BOOTBLOCK support ......................................................................
Patch Set 23: Code-Review-1
(2 comments)
https://review.coreboot.org/#/c/29662/23/src/soc/intel/braswell/bootblock/ca... File src/soc/intel/braswell/bootblock/cache_as_ram.S:
https://review.coreboot.org/#/c/29662/23/src/soc/intel/braswell/bootblock/ca... PS23, Line 27: .global cache_as_ram To not have any functional changes, you need to update the microcode here, preferably after setting up caching of the ROM to speed up the cbfswalk.
https://review.coreboot.org/#/c/29662/23/src/soc/intel/braswell/romstage/car... File src/soc/intel/braswell/romstage/car_stage_entry.S:
https://review.coreboot.org/#/c/29662/23/src/soc/intel/braswell/romstage/car... PS23, Line 24: #include "src/drivers/intel/fsp1_1/after_raminit.S" : https://review.coreboot.org/c/coreboot/+/30686 implements postcar stage, which handles exiting CAR more cleanly. It might be a good idea to get that merged first?
-
Arthur Heymans (Code Review)