Change in coreboot[master]: soc/intel/tgl: add device UART #3 to chipset devicetree

[Felix Singer (Code Review)]

Attention is currently required from: Nico Huber, Tim Wawrzynczak, Paul Menzel, Subrata Banik, Angel Pons, Michael Niewöhner, Patrick Rudolph.
Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62624 )

Change subject: soc/intel/tgl: add device UART #3 to chipset devicetree
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Patch Set 2: Code-Review+2

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/62624/comment/d850052b_7fc6517f 
PS1, Line 7: missing
> tbh, I don't see what reducing from 63 chars to 55 would help but I don't care in that case. […]

Of course it doesn't have much effect. That's why I marked it as nit ;) I just try to stay close to the 50 chars limit.

However, thanks 😊