Change in ...coreboot[master]: soc/intel/cannonlake: Move common definitions to a header file
Rizwan Qureshi has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31621
Change subject: soc/intel/cannonlake: Move common definitions to a header file ......................................................................
soc/intel/cannonlake: Move common definitions to a header file
Move common definitions for PCH H and LP to a common header.
Change-Id: If47692ecb05134db1ee6c0fb10125d6a1b67f127 Signed-off-by: Rizwan Qureshi rizwan.qureshi@intel.com --- A src/soc/intel/cannonlake/include/soc/gpio_common.h M src/soc/intel/cannonlake/include/soc/gpio_defs.h M src/soc/intel/cannonlake/include/soc/gpio_defs_cnp_h.h 3 files changed, 27 insertions(+), 20 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/31621/1
diff --git a/src/soc/intel/cannonlake/include/soc/gpio_common.h b/src/soc/intel/cannonlake/include/soc/gpio_common.h new file mode 100644 index 0000000..722637d --- /dev/null +++ b/src/soc/intel/cannonlake/include/soc/gpio_common.h @@ -0,0 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 Intel Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#ifndef _SOC_CANNONLAKE_GPIO_COMMON_H_ +#define _SOC_CANNONLAKE_GPIO_COMMON_H_ +#define GPIORXSTATE_MASK 0x1 +#define GPIORXSTATE_SHIFT 1 +#define GPIOTXSTATE_MASK 0x1 +#define GPIOPADMODE_MASK 0xC00 +#define GPIOPADMODE_SHIFT 10 +#define GPIOTXBUFDIS_MASK 0x100 +#define GPIORXBUFDIS_MASK 0x200 + +#endif diff --git a/src/soc/intel/cannonlake/include/soc/gpio_defs.h b/src/soc/intel/cannonlake/include/soc/gpio_defs.h index 3399526..8a944b1 100644 --- a/src/soc/intel/cannonlake/include/soc/gpio_defs.h +++ b/src/soc/intel/cannonlake/include/soc/gpio_defs.h @@ -19,9 +19,9 @@ #ifndef __ACPI__ #include <stddef.h> #endif +#include <soc/gpio_common.h> #include <soc/gpio_soc_defs.h>
- #define GPIO_NUM_PAD_CFG_REGS 4 /* DW0, DW1, DW2, DW3 */
#define NUM_GPIO_COMx_GPI_REGS(n) \ @@ -250,13 +250,4 @@ #define GPI_SMI_EN_0 0x1A0 #define PAD_CFG_BASE 0x600
-#define GPIORXSTATE_MASK 0x1 -#define GPIORXSTATE_SHIFT 1 -#define GPIOTXSTATE_MASK 0x1 -#define GPIOPADMODE_MASK 0xC00 -#define GPIOPADMODE_SHIFT 10 -#define GPIOTXBUFDIS_MASK 0x100 -#define GPIOTXBUFDIS_SHIFT 8 -#define GPIORXBUFDIS_MASK 0x200 -#define GPIORXBUFDIS_SHIFT 9 #endif diff --git a/src/soc/intel/cannonlake/include/soc/gpio_defs_cnp_h.h b/src/soc/intel/cannonlake/include/soc/gpio_defs_cnp_h.h index c7f3c81..e77dbf8 100644 --- a/src/soc/intel/cannonlake/include/soc/gpio_defs_cnp_h.h +++ b/src/soc/intel/cannonlake/include/soc/gpio_defs_cnp_h.h @@ -19,9 +19,9 @@ #ifndef __ACPI__ #include <stddef.h> #endif +#include <soc/gpio_common.h> #include <soc/gpio_soc_defs_cnp_h.h>
- #define GPIO_NUM_PAD_CFG_REGS 4 /* DW0, DW1, DW2, DW3 */
#define NUM_GPIO_COMx_GPI_REGS(n) \ @@ -324,13 +324,4 @@ #define GPI_SMI_EN_0 0x1A0 #define PAD_CFG_BASE 0x600
-#define GPIORXSTATE_MASK 0x1 -#define GPIORXSTATE_SHIFT 1 -#define GPIOTXSTATE_MASK 0x1 -#define GPIOPADMODE_MASK 0xC00 -#define GPIOPADMODE_SHIFT 10 -#define GPIOTXBUFDIS_MASK 0x100 -#define GPIOTXBUFDIS_SHIFT 8 -#define GPIORXBUFDIS_MASK 0x200 -#define GPIORXBUFDIS_SHIFT 9 #endif
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31621 )
Change subject: soc/intel/cannonlake: Move common definitions to a header file ......................................................................
Patch Set 1: Code-Review+2
(1 comment)
https://review.coreboot.org/#/c/31621/1/src/soc/intel/cannonlake/include/soc... File src/soc/intel/cannonlake/include/soc/gpio_common.h:
https://review.coreboot.org/#/c/31621/1/src/soc/intel/cannonlake/include/soc... PS1, Line 15: #ifndef _SOC_CANNONLAKE_GPIO_COMMON_H_ : #define _SOC_CANNONLAKE_GPIO_COMMON_H_ please add empty lines around these
Hello Patrick Rudolph, build bot (Jenkins), Nico Huber,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/31621
to look at the new patch set (#2).
Change subject: soc/intel/cannonlake: Move common definitions to a header file ......................................................................
soc/intel/cannonlake: Move common definitions to a header file
Move common definitions for PCH H and LP to a common header.
Change-Id: If47692ecb05134db1ee6c0fb10125d6a1b67f127 Signed-off-by: Rizwan Qureshi rizwan.qureshi@intel.com --- A src/soc/intel/cannonlake/include/soc/gpio_common.h M src/soc/intel/cannonlake/include/soc/gpio_defs.h M src/soc/intel/cannonlake/include/soc/gpio_defs_cnp_h.h 3 files changed, 28 insertions(+), 20 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/31621/2
Rizwan Qureshi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31621 )
Change subject: soc/intel/cannonlake: Move common definitions to a header file ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/31621/1/src/soc/intel/cannonlake/include/soc... File src/soc/intel/cannonlake/include/soc/gpio_common.h:
https://review.coreboot.org/#/c/31621/1/src/soc/intel/cannonlake/include/soc... PS1, Line 15: #ifndef _SOC_CANNONLAKE_GPIO_COMMON_H_ : #define _SOC_CANNONLAKE_GPIO_COMMON_H_
please add empty lines around these
Done
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31621 )
Change subject: soc/intel/cannonlake: Move common definitions to a header file ......................................................................
Patch Set 3: Code-Review+2
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31621 )
Change subject: soc/intel/cannonlake: Move common definitions to a header file ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/#/c/31621/4/src/soc/intel/cannonlake/include/soc... File src/soc/intel/cannonlake/include/soc/gpio_common.h:
https://review.coreboot.org/#/c/31621/4/src/soc/intel/cannonlake/include/soc... PS4, Line 18: #define GPIORXSTATE_MASK 0x1 Can these be added to gpio.h directly instead of creating another common file?
Rizwan Qureshi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31621 )
Change subject: soc/intel/cannonlake: Move common definitions to a header file ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/#/c/31621/4/src/soc/intel/cannonlake/include/soc... File src/soc/intel/cannonlake/include/soc/gpio_common.h:
https://review.coreboot.org/#/c/31621/4/src/soc/intel/cannonlake/include/soc... PS4, Line 19: #define GPIORXSTATE_SHIFT 1 : #define GPIOTXSTATE_MASK 0x1 : #define GPIOPADMODE_MASK 0xC00 : #define GPIOPADMODE_SHIFT 10 : #define GPIOTXBUFDIS_MASK 0x100 : #define GPIORXBUFDIS_MASK 0x200 These are also present in src/soc/intel/common/block/include/intelblocks/gpio_defs.h, I think we can just use those.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31621 )
Change subject: soc/intel/cannonlake: Move common definitions to a header file ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/#/c/31621/4/src/soc/intel/cannonlake/include/soc... File src/soc/intel/cannonlake/include/soc/gpio_common.h:
https://review.coreboot.org/#/c/31621/4/src/soc/intel/cannonlake/include/soc... PS4, Line 19: #define GPIORXSTATE_SHIFT 1 : #define GPIOTXSTATE_MASK 0x1 : #define GPIOPADMODE_MASK 0xC00 : #define GPIOPADMODE_SHIFT 10 : #define GPIOTXBUFDIS_MASK 0x100 : #define GPIORXBUFDIS_MASK 0x200
These are also present in src/soc/intel/common/block/include/intelblocks/gpio_defs. […]
SG
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31621 )
Change subject: soc/intel/cannonlake: Move common definitions to a header file ......................................................................
Patch Set 4: -Code-Review
Lijian Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31621 )
Change subject: soc/intel/cannonlake: Move common definitions to a header file ......................................................................
Patch Set 4: Code-Review+2
Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31621 )
Change subject: soc/intel/cannonlake: Move common definitions to a header file ......................................................................
soc/intel/cannonlake: Move common definitions to a header file
Move common definitions for PCH H and LP to a common header.
Change-Id: If47692ecb05134db1ee6c0fb10125d6a1b67f127 Signed-off-by: Rizwan Qureshi rizwan.qureshi@intel.com Reviewed-on: https://review.coreboot.org/c/31621 Reviewed-by: Lijian Zhao lijian.zhao@intel.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- A src/soc/intel/cannonlake/include/soc/gpio_common.h M src/soc/intel/cannonlake/include/soc/gpio_defs.h M src/soc/intel/cannonlake/include/soc/gpio_defs_cnp_h.h 3 files changed, 28 insertions(+), 20 deletions(-)
Approvals: build bot (Jenkins): Verified Lijian Zhao: Looks good to me, approved
diff --git a/src/soc/intel/cannonlake/include/soc/gpio_common.h b/src/soc/intel/cannonlake/include/soc/gpio_common.h new file mode 100644 index 0000000..6d27f89 --- /dev/null +++ b/src/soc/intel/cannonlake/include/soc/gpio_common.h @@ -0,0 +1,26 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 Intel Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#ifndef _SOC_CANNONLAKE_GPIO_COMMON_H_ +#define _SOC_CANNONLAKE_GPIO_COMMON_H_ + +#define GPIORXSTATE_MASK 0x1 +#define GPIORXSTATE_SHIFT 1 +#define GPIOTXSTATE_MASK 0x1 +#define GPIOPADMODE_MASK 0xC00 +#define GPIOPADMODE_SHIFT 10 +#define GPIOTXBUFDIS_MASK 0x100 +#define GPIORXBUFDIS_MASK 0x200 + +#endif diff --git a/src/soc/intel/cannonlake/include/soc/gpio_defs.h b/src/soc/intel/cannonlake/include/soc/gpio_defs.h index 3399526..8a944b1 100644 --- a/src/soc/intel/cannonlake/include/soc/gpio_defs.h +++ b/src/soc/intel/cannonlake/include/soc/gpio_defs.h @@ -19,9 +19,9 @@ #ifndef __ACPI__ #include <stddef.h> #endif +#include <soc/gpio_common.h> #include <soc/gpio_soc_defs.h>
- #define GPIO_NUM_PAD_CFG_REGS 4 /* DW0, DW1, DW2, DW3 */
#define NUM_GPIO_COMx_GPI_REGS(n) \ @@ -250,13 +250,4 @@ #define GPI_SMI_EN_0 0x1A0 #define PAD_CFG_BASE 0x600
-#define GPIORXSTATE_MASK 0x1 -#define GPIORXSTATE_SHIFT 1 -#define GPIOTXSTATE_MASK 0x1 -#define GPIOPADMODE_MASK 0xC00 -#define GPIOPADMODE_SHIFT 10 -#define GPIOTXBUFDIS_MASK 0x100 -#define GPIOTXBUFDIS_SHIFT 8 -#define GPIORXBUFDIS_MASK 0x200 -#define GPIORXBUFDIS_SHIFT 9 #endif diff --git a/src/soc/intel/cannonlake/include/soc/gpio_defs_cnp_h.h b/src/soc/intel/cannonlake/include/soc/gpio_defs_cnp_h.h index c7f3c81..e77dbf8 100644 --- a/src/soc/intel/cannonlake/include/soc/gpio_defs_cnp_h.h +++ b/src/soc/intel/cannonlake/include/soc/gpio_defs_cnp_h.h @@ -19,9 +19,9 @@ #ifndef __ACPI__ #include <stddef.h> #endif +#include <soc/gpio_common.h> #include <soc/gpio_soc_defs_cnp_h.h>
- #define GPIO_NUM_PAD_CFG_REGS 4 /* DW0, DW1, DW2, DW3 */
#define NUM_GPIO_COMx_GPI_REGS(n) \ @@ -324,13 +324,4 @@ #define GPI_SMI_EN_0 0x1A0 #define PAD_CFG_BASE 0x600
-#define GPIORXSTATE_MASK 0x1 -#define GPIORXSTATE_SHIFT 1 -#define GPIOTXSTATE_MASK 0x1 -#define GPIOPADMODE_MASK 0xC00 -#define GPIOPADMODE_SHIFT 10 -#define GPIOTXBUFDIS_MASK 0x100 -#define GPIOTXBUFDIS_SHIFT 8 -#define GPIORXBUFDIS_MASK 0x200 -#define GPIORXBUFDIS_SHIFT 9 #endif
-
Furquan Shaikh (Code Review) -
Lijian Zhao (Code Review)
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Nico Huber (Code Review)
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Patrick Georgi (Code Review)
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Rizwan Qureshi (Code Review)