Change in coreboot[master]: soc/qualcomm/sc7280: DDR One-Time-Training Support

[Ravi kumar (Code Review)]

Attention is currently required from: Shelley Chen, Ravi kumar, Paul Menzel, Sudheer Amrabadi.
Hello build bot (Jenkins), Sudheer Amrabadi,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/54352

to look at the new patch set (#31).

Change subject: soc/qualcomm/sc7280: DDR One-Time-Training Support
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soc/qualcomm/sc7280: DDR One-Time-Training Support

Introduce DDR One-Time-Training Support
Device reboots without training from second iteration
and also DDR training data is 32kb size, hence update
required in memlayout and to sync with upstream changes
the Fmap size even got bumped up.

BUG=b:182963902
TEST=Validated on qualcomm sc7280 development board

Change-Id: I81038c5c7802c154f4310509c6c64710580b8ce4
Signed-off-by: Sudheer Kumar Amrabadi 
---
M src/mainboard/google/herobrine/chromeos.fmd
M src/soc/qualcomm/sc7280/memlayout.ld
2 files changed, 3 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/54352/31