[S] Change in coreboot[main]: soc/intel/xeon_sp/spr: Improve CPU codes

[Shuo Liu (Code Review)]

Attention is currently required from: Angel Pons, Arthur Heymans, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Tim Chu.

Shuo Liu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/82097?usp=email )

Change subject: soc/intel/xeon_sp/spr: Improve CPU codes
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Patch Set 2:

(1 comment)

File src/soc/intel/xeon_sp/spr/cpu.c:

https://review.coreboot.org/c/coreboot/+/82097/comment/8192a6ac_54b06e76 :
PS2, Line 273: BIOS_WARNING
> Why is it an improvement? Shouldn't there be always microcodes in CBFS? Does it even boot without?

This is a point raised during review by Paul. If without CBFS ucode, the CPU will still boot using the default provisioned one, but it is highly recommended to do BIOS (CBFS) carried ucode update since it could contains SoC vendor delivered fixes (e.g. security, et al).