Change in coreboot[master]: soc/intel/alderlake: provide a list of D-states to enter LPM

[Angel Pons (Code Review)]

Attention is currently required from: Tarun Tuli, Subrata Banik, Matt DeVillier, Tim Wawrzynczak, Paul Menzel.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63969 )

Change subject: soc/intel/alderlake: provide a list of D-states to enter LPM
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Patch Set 17:

(2 comments)

File src/acpi/acpi.c:

https://review.coreboot.org/c/coreboot/+/63969/comment/e8ba310f_87aef617 
PS17, Line 1485: __weak uint8_t soc_lpi_get_constraints(void) { return 0; }
> Another option is the weak implementation does the single device/dummy entry creation and that gets  […]

I'm fine with this approach, but a Kconfig would also work.

File src/soc/intel/common/block/acpi/pep.c:

https://review.coreboot.org/c/coreboot/+/63969/comment/a3360977_53ec786a 
PS17, Line 74: 	{
nit: brace goes to previous line