Change in coreboot[master]: mb/google/boldar: Add memory configuration supoprt for boldar

[Aamir Bohra (Code Review)]

Aamir Bohra has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46646 )

Change subject: mb/google/boldar: Add memory configuration supoprt for boldar
......................................................................

mb/google/boldar: Add memory configuration supoprt for boldar

Change-Id: Ie085310a8aaac4e5d68b6fdf335f6bfac680a9f7
Signed-off-by: Aamir Bohra 
---
M src/mainboard/google/volteer/variants/boldar/memory.c
M src/mainboard/google/volteer/variants/boldar/memory/Makefile.inc
2 files changed, 63 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/46646/1

diff --git a/src/mainboard/google/volteer/variants/boldar/memory.c b/src/mainboard/google/volteer/variants/boldar/memory.c
index 1bce421..b7cd170 100644
--- a/src/mainboard/google/volteer/variants/boldar/memory.c
+++ b/src/mainboard/google/volteer/variants/boldar/memory.c
@@ -4,6 +4,68 @@
 #include <baseboard/variants.h>
 #include <gpio.h>

+static const struct lpddr5x_cfg baseboard_lpddr5x_memcfg = {
+	/* DQ CPU<>DRAM map */
+	.dq_map = {
+		[0] = {
+			{10, 8, 9, 12, 15, 13, 14, 11,},  /* DDR0_DQ0[7:0] */
+			{2, 6, 3, 7, 5, 1, 4, 0, }, /* DDR0_DQ1[7:0] */
+		},
+		[1] = {
+			{2, 0, 3, 2, 6, 4, 7, 5, },  /* DDR1_DQ0[7:0] */
+			{8, 9, 10, 11, 13, 12, 14, 15,}, /* DDR1_DQ1[7:0] */
+		},
+		[2] = {
+			{1, 0, 3, 2, 6, 4, 5, 7, },  /* DDR2_DQ0[7:0] */
+			{12, 13, 8, 9, 15, 11, 14, 10,}, /* DDR2_DQ1[7:0] */
+		},
+		[3] = {
+			{8, 9, 11, 10, 13, 15, 14, 12,},  /* DDR3_DQ0[7:0] */
+			{6, 5, 4, 7, 3, 2, 0, 1,}, /* DDR3_DQ1[7:0] */
+		},
+		[4] = {
+			{8, 13, 9, 12, 15, 11, 14, 10,},  /* DDR4_DQ0[7:0] */
+			{2, 7, 3, 6, 5, 1, 4, 0,}, /* DDR4_DQ1[7:0] */
+		},
+		[5] = {
+			{0, 2, 1, 3, 6, 7, 4, 5},  /* DDR5_DQ0[7:0] */
+			{13, 12, 15, 14, 10, 9, 8, 11,}, /* DDR5_DQ1[7:0] */
+		},
+		[6] = {
+			{8, 13, 9, 12, 15, 10, 14, 11,},  /* DDR6_DQ0[7:0] */
+			{3, 6, 2, 7, 4, 1, 0, 5}, /* DDR6_DQ1[7:0] */
+		},
+		[7] = {
+			{11, 9, 10, 8, 12, 14, 13, 15,},  /* DDR7_DQ0[7:0] */
+			{4, 6, 1, 0, 7, 3, 2, 5, }, /* DDR7_DQ1[7:0] */
+		},
+	},
+
+	/* DQS CPU<>DRAM map */
+	.dqs_map = {
+		[0] = { 0, 1 },  /* DDR0_DQS[1:0] */
+		[1] = { 0, 1 },  /* DDR1_DQS[1:0] */
+		[2] = { 0, 1 },  /* DDR2_DQS[1:0] */
+		[3] = { 0, 1 },  /* DDR3_DQS[1:0] */
+		[4] = { 0, 1 },  /* DDR4_DQS[1:0] */
+		[5] = { 0, 1 },  /* DDR5_DQS[1:0] */
+		[6] = { 0, 1 },  /* DDR6_DQS[1:0] */
+		[7] = { 0, 1 },  /* DDR7_DQS[1:0] */
+	},
+
+	.ect = 1, /* Enable Early Command Training */
+};
+
+static const struct ddr_memory_cfg baseboard_memcfg = {
+	.mem_type = MEMTYPE_LPDDR5X,
+	.lpddr5_cfg = &baseboard_lpddr5x_memcfg
+};
+
+const struct ddr_memory_cfg *__weak variant_memory_params(void)
+{
+	return &baseboard_memcfg;
+}
+
 int variant_memory_sku(void)
 {
    gpio_t spd_gpios[] = {
diff --git a/src/mainboard/google/volteer/variants/boldar/memory/Makefile.inc b/src/mainboard/google/volteer/variants/boldar/memory/Makefile.inc
index ed894fe..789b7ad 100644
--- a/src/mainboard/google/volteer/variants/boldar/memory/Makefile.inc
+++ b/src/mainboard/google/volteer/variants/boldar/memory/Makefile.inc
@@ -2,4 +2,4 @@
 ## This is an auto-generated file. Do not edit!!

SPD_SOURCES =
-SPD_SOURCES += ddr4-spd-empty.hex      # ID = 0(0b0000)  Parts = EMPTY
+SPD_SOURCES += lpddr5-spd-1.hex      # ID = 0(0b0000)  Parts = MT62F512M32D2DR-031 WT:B

[Aamir Bohra (Code Review)]

Aamir Bohra has removed Patrick Georgi from this change.  ( https://review.coreboot.org/c/coreboot/+/46646 )

Change subject: mb/google/boldar: Add memory configuration supoprt for boldar
......................................................................

Removed reviewer Patrick Georgi.

[Aamir Bohra (Code Review)]

Aamir Bohra has removed Martin Roth from this change.  ( https://review.coreboot.org/c/coreboot/+/46646 )

Change subject: mb/google/boldar: Add memory configuration supoprt for boldar
......................................................................

Removed reviewer Martin Roth.