Change in coreboot[master]: mainboard/intel/coffeelake_rvp: Enable LAN feature

[Kin Wai Ng (Code Review)]

Hello Naresh Solanki, Subrata Banik, Balaji Manigandan, Aamir Bohra, Maulik V Vaghela, Rizwan Qureshi,

I'd like you to do a code review. Please visit

https://review.coreboot.org/25235

to review the following change.

Change subject: mainboard/intel/coffeelake_rvp: Enable LAN feature
......................................................................

mainboard/intel/coffeelake_rvp: Enable LAN feature

Change-Id: Ic0989ae0976f4a62196f134e21fee63490e9d337
Signed-off-by: Ng Kin Wai 
---
M src/mainboard/intel/coffeelake_rvp/variants/cfl_h/devicetree.cb
M src/soc/intel/coffeelake/chip.c
M src/soc/intel/coffeelake/chip.h
3 files changed, 6 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/25235/1

diff --git a/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/devicetree.cb b/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/devicetree.cb
index fe6736e..736abec 100755
--- a/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/devicetree.cb
+++ b/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/devicetree.cb
@@ -34,6 +34,9 @@
    register "PchHdaDspEnable" = "1"
    register "PchHdaAudioLinkHda" = "1"

+	register "PchLanEnable" = "1"
+	register "PchLanLtrEnable" = "1"
+
    register "PcieRpEnable[0]" = "1"
    register "PcieRpEnable[1]" = "1"
    register "PcieRpEnable[2]" = "1"
@@ -152,6 +155,6 @@
    	end # Intel HDA
    	device pci 1f.4 on  end # SMBus
    	device pci 1f.5 on  end # PCH SPI
-		device pci 1f.6 off end # GbE
+		device pci 1f.6 on end # GbE
    end
 end
diff --git a/src/soc/intel/coffeelake/chip.c b/src/soc/intel/coffeelake/chip.c
index 9819ee1..42926fa 100755
--- a/src/soc/intel/coffeelake/chip.c
+++ b/src/soc/intel/coffeelake/chip.c
@@ -206,6 +206,7 @@

/* Lan */
    params->PchLanEnable = config->PchLanEnable;
+	params->PchLanLtrEnable = config->PchLanLtrEnable;

/* Audio */
    params->PchHdaDspEnable = config->PchHdaDspEnable;
diff --git a/src/soc/intel/coffeelake/chip.h b/src/soc/intel/coffeelake/chip.h
old mode 100644
new mode 100755
index 20c909a..877e26b
--- a/src/soc/intel/coffeelake/chip.h
+++ b/src/soc/intel/coffeelake/chip.h
@@ -112,6 +112,7 @@

/* LAN controller. 1:Enable, 0:Disable */
    uint8_t PchLanEnable;
+	uint8_t PchLanLtrEnable;

/* USB related */
    struct usb2_port_config usb2_ports[16];