Change in coreboot[master]: mb/up/squared: 2/3 Rewrite pad config using intelp2m

[Maxim Polyakov (Code Review)]

Maxim Polyakov has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42915 )

Change subject: mb/up/squared: 2/3 Rewrite pad config using intelp2m
......................................................................

mb/up/squared: 2/3 Rewrite pad config using intelp2m

This patch excludes bit fields that must be ignored in order to convert
current macros to target PAD_CFG_*() macros. The following commands
were used for this:

./intelp2m -ii -adv -ign -t 1 -p apl -file ./test/up-gpio.h

Change-Id: Ic9b6e63c1b84b97726886bef35c434dd9153eb78
Signed-off-by: Maxim Polyakov 
---
M src/mainboard/up/squared/gpio.h
1 file changed, 176 insertions(+), 176 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/42915/1

diff --git a/src/mainboard/up/squared/gpio.h b/src/mainboard/up/squared/gpio.h
index 96aad4a..e53ebdd 100644
--- a/src/mainboard/up/squared/gpio.h
+++ b/src/mainboard/up/squared/gpio.h
@@ -17,12 +17,12 @@
    /* GPIO_0 - *GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_0, NONE, PWROK, OFF, ACPI), */
    _PAD_CFG_STRUCT(GPIO_0,
-		PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),
+		PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),

/* GPIO_1 - *GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_1, NONE, PWROK, OFF, ACPI), */
    _PAD_CFG_STRUCT(GPIO_1,
-		PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),
+		PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),

/* GPIO_2 - *GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_2, NONE, PWROK, OFF, ACPI), */
@@ -87,17 +87,17 @@
    /* GPIO_14 - *GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_14, NONE, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(GPIO_14,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),

/* GPIO_15 - *GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_15, NONE, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(GPIO_15,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),

/* GPIO_16 - *GPIO */
    /* PAD_CFG_GPI_SCI_IOS(GPIO_16, NONE, DEEP, LEVEL, INVERT, TxDRxE, SAME), */
    _PAD_CFG_STRUCT(GPIO_16,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 1),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE),
    	PAD_IOSSTATE(TxDRxE)),

/* GPIO_17 - *GPIO */
@@ -129,7 +129,7 @@
    /* GPIO_22 - *GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_22, NONE, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(GPIO_22,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),

/* GPIO_23 - *GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_23, NONE, DEEP, OFF, ACPI), */
@@ -139,12 +139,12 @@
    /* GPIO_24 - *GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_24, NONE, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(GPIO_24,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),

/* GPIO_25 - *GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_25, NONE, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(GPIO_25,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),

/* GPIO_26 - *GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_26, NONE, DEEP, OFF, ACPI), */
@@ -159,47 +159,47 @@
    /* GPIO_28 - *GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_28, UP_20K, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(GPIO_28,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE),
    	PAD_PULL(UP_20K)),

/* GPIO_29 - *GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_29, UP_20K, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(GPIO_29,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE),
    	PAD_PULL(UP_20K)),

/* GPIO_30 - *GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_30, UP_20K, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(GPIO_30,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE),
    	PAD_PULL(UP_20K)),

/* GPIO_31 - *GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_31, UP_20K, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(GPIO_31,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE),
    	PAD_PULL(UP_20K)),

/* GPIO_32 - *GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_32, NONE, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(GPIO_32,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),

/* GPIO_33 - *GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_33, NONE, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(GPIO_33,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),

/* GPIO_34 - PWM0 */
    /* PAD_CFG_NF(GPIO_34, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_34,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* GPIO_35 - PWM1 */
    /* PAD_CFG_NF(GPIO_35, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_35,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* GPIO_36 - *GPIO */
@@ -210,55 +210,55 @@
    /* GPIO_37 - PWM3 */
    /* PAD_CFG_NF(GPIO_37, DN_20K, PWROK, NF1), */
    _PAD_CFG_STRUCT(GPIO_37,
-		PAD_FUNC(NF1) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1),
    	PAD_PULL(DN_20K)),

/* GPIO_38 - LPSS_UART0_RXD */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_38, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), */
    _PAD_CFG_STRUCT(GPIO_38,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1) | PAD_IOSTERM(DISPUPD)),

/* GPIO_39 - LPSS_UART0_TXD */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD), */
    _PAD_CFG_STRUCT(GPIO_39,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSTERM(DISPUPD)),

/* GPIO_40 - LPSS_UART0_RTS_N */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_40, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD), */
    _PAD_CFG_STRUCT(GPIO_40,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSTERM(DISPUPD)),

/* GPIO_41 - LPSS_UART0_CTS_N */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_41, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), */
    _PAD_CFG_STRUCT(GPIO_41,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1) | PAD_IOSTERM(DISPUPD)),

/* GPIO_42 - LPSS_UART1_RXD */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_42, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), */
    _PAD_CFG_STRUCT(GPIO_42,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1) | PAD_IOSTERM(DISPUPD)),

/* GPIO_43 - LPSS_UART1_TXD */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_43, UP_20K, DEEP, NF1, HIZCRx0, DISPUPD), */
    _PAD_CFG_STRUCT(GPIO_43,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(DISPUPD)),

/* GPIO_44 - LPSS_UART1_RTS_N */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_44, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD), */
    _PAD_CFG_STRUCT(GPIO_44,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSTERM(DISPUPD)),

/* GPIO_45 - LPSS_UART1_CTS_N */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_45, NONE, DEEP, NF1, HIZCRx0, DISPUPD), */
    _PAD_CFG_STRUCT(GPIO_45,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(DISPUPD)),

/* GPIO_46 - *GPIO */
@@ -346,56 +346,56 @@
    /* TCK - *JTAG_TCK */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(TCK, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(TCK,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
-		PAD_PULL(DN_20K) | PAD_IOSSTATE(IGNORE) | (3 << 22)),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
+		PAD_PULL(DN_20K) | PAD_IOSSTATE(IGNORE)),

/* TRST_B - *JTAG_TRST_N */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(TRST_B, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(TRST_B,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
-		PAD_PULL(DN_20K) | PAD_IOSSTATE(IGNORE) | (3 << 22)),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
+		PAD_PULL(DN_20K) | PAD_IOSSTATE(IGNORE)),

/* TMS - *JTAG_TMS */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(TMS, UP_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(TMS,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
-		PAD_PULL(UP_20K) | PAD_IOSSTATE(IGNORE) | (3 << 22)),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
+		PAD_PULL(UP_20K) | PAD_IOSSTATE(IGNORE)),

/* TDI - *JTAG_TDI */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(TDI, UP_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(TDI,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
-		PAD_PULL(UP_20K) | PAD_IOSSTATE(IGNORE) | (3 << 22)),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
+		PAD_PULL(UP_20K) | PAD_IOSSTATE(IGNORE)),

/* CX_PMODE - *JTAG_PMODE */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(CX_PMODE, NONE, DEEP, NF1), */
    _PAD_CFG_STRUCT(CX_PMODE,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
-		PAD_IOSSTATE(IGNORE) | (3 << 22)),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
+		PAD_IOSSTATE(IGNORE)),

/* CX_PREQ_B - *JTAG_PREQ_N */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(CX_PREQ_B, UP_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(CX_PREQ_B,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
-		PAD_PULL(UP_20K) | PAD_IOSSTATE(IGNORE) | (3 << 22)),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
+		PAD_PULL(UP_20K) | PAD_IOSSTATE(IGNORE)),

/* JTAGX - *JTAGX */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(JTAGX, UP_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(JTAGX,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
-		PAD_PULL(UP_20K) | PAD_IOSSTATE(IGNORE) | (3 << 22)),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
+		PAD_PULL(UP_20K) | PAD_IOSSTATE(IGNORE)),

/* CX_PRDY_B - *JTAG_PRDY_N */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(CX_PRDY_B, UP_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(CX_PRDY_B,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
-		PAD_PULL(UP_20K) | PAD_IOSSTATE(IGNORE) | (1 << 22)),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
+		PAD_PULL(UP_20K) | PAD_IOSSTATE(IGNORE)),

/* TDO - *JTAG_TDO */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(TDO, UP_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(TDO,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
-		PAD_PULL(UP_20K) | PAD_IOSSTATE(IGNORE) | (1 << 22)),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
+		PAD_PULL(UP_20K) | PAD_IOSSTATE(IGNORE)),

/* CNV_BRI_DT - GPIO */
    /* PAD_CFG_GPO_IOSSTATE_IOSTERM(CNV_BRI_DT, 1, DEEP, DN_20K, IGNORE, SAME), */
@@ -436,25 +436,25 @@
    /* GPIO_187 - *DDI0_DDC_SDA */
    /* PAD_CFG_NF_IOSSTATE(GPIO_187, UP_20K, DEEP, NF1, HIZCRx0), */
    _PAD_CFG_STRUCT(GPIO_187,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx0)),

/* GPIO_188 - *DDI0_DDC_SCL */
    /* PAD_CFG_NF_IOSSTATE(GPIO_188, UP_20K, DEEP, NF1, HIZCRx0), */
    _PAD_CFG_STRUCT(GPIO_188,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx0)),

/* GPIO_189 - *DDI1_DDC_SDA */
    /* PAD_CFG_NF(GPIO_189, UP_2K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_189,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_2K)),

/* GPIO_190 - *DDI1_DDC_SCL */
    /* PAD_CFG_NF(GPIO_190, UP_2K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_190,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_2K)),

/* GPIO_191 - GPIO */
@@ -470,19 +470,19 @@
    /* GPIO_193 - *PNL0_VDDEN */
    /* PAD_CFG_NF_IOSSTATE(GPIO_193, DN_20K, DEEP, NF1, Tx0RxDCRx0), */
    _PAD_CFG_STRUCT(GPIO_193,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(Tx0RxDCRx0)),

/* GPIO_194 - *PNL0_BKLTEN */
    /* PAD_CFG_NF_IOSSTATE(GPIO_194, DN_20K, DEEP, NF1, Tx0RxDCRx0), */
    _PAD_CFG_STRUCT(GPIO_194,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(Tx0RxDCRx0)),

/* GPIO_195 - *PNL0_BKLTCTL */
    /* PAD_CFG_NF_IOSSTATE(GPIO_195, DN_20K, DEEP, NF1, Tx0RxDCRx0), */
    _PAD_CFG_STRUCT(GPIO_195,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(Tx0RxDCRx0)),

/* GPIO_196 - GPIO */
@@ -503,13 +503,13 @@
    /* GPIO_199 - DDI1_HPD */
    /* PAD_CFG_NF(GPIO_199, UP_20K, DEEP, NF2), */
    _PAD_CFG_STRUCT(GPIO_199,
-		PAD_FUNC(NF2) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF2) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K)),

/* GPIO_200 - DDI0_HPD */
    /* PAD_CFG_NF(GPIO_200, UP_20K, DEEP, NF2), */
    _PAD_CFG_STRUCT(GPIO_200,
-		PAD_FUNC(NF2) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF2) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K)),

/* GPIO_201 - GPIO */
@@ -525,28 +525,28 @@
    /* GPIO_203 - GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_203, NONE, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(GPIO_203,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),

/* GPIO_204 - GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_204, NONE, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(GPIO_204,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),

/* PMC_SPI_FS0 - GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(PMC_SPI_FS0, NONE, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(PMC_SPI_FS0,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),

/* PMC_SPI_FS1 - DDI2_HPD */
    /* PAD_CFG_NF(PMC_SPI_FS1, UP_20K, DEEP, NF2), */
    _PAD_CFG_STRUCT(PMC_SPI_FS1,
-		PAD_FUNC(NF2) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF2) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K)),

/* PMC_SPI_FS2 - GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(PMC_SPI_FS2, NONE, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(PMC_SPI_FS2,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),

/* PMC_SPI_RXD - GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(PMC_SPI_RXD, NONE, DEEP, OFF, ACPI), */
@@ -566,13 +566,13 @@
    /* PMIC_PWRGOOD - GPIO */
    /* PAD_CFG_TERM_GPO(PMIC_PWRGOOD, 1, UP_1K, DEEP), */
    _PAD_CFG_STRUCT(PMIC_PWRGOOD,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | (1 << 1) | 1,
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1,
    	PAD_PULL(UP_1K)),

/* PMIC_RESET_B - GPIO */
    /* PAD_CFG_GPI_TRIG_IOSSTATE_OWN(PMIC_RESET_B, NONE, DEEP, OFF, IGNORE, ACPI), */
    _PAD_CFG_STRUCT(PMIC_RESET_B,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE),
    	PAD_IOSSTATE(IGNORE)),

/* GPIO_213 - GPIO */
@@ -584,7 +584,7 @@
    /* GPIO_214 - GPIO */
    /* PAD_CFG_GPI_TRIG_IOS_OWN(GPIO_214, UP_20K, DEEP, OFF, TxLASTRxE, ENPU, ACPI), */
    _PAD_CFG_STRUCT(GPIO_214,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE),
    	PAD_PULL(UP_20K) | PAD_IOSTERM(ENPU)),

/* GPIO_215 - GPIO */
@@ -596,7 +596,7 @@
    /* PMIC_THERMTRIP_B - *THERMTRIP_N */
    /* PAD_CFG_NF(PMIC_THERMTRIP_B, UP_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(PMIC_THERMTRIP_B,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K)),

/* PMIC_STDBY - GPIO */
@@ -608,7 +608,7 @@
    /* PROCHOT_B - *PROCHOT_N */
    /* PAD_CFG_NF_IOSSTATE(PROCHOT_B, UP_20K, DEEP, NF1, HIZCRx1), */
    _PAD_CFG_STRUCT(PROCHOT_B,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1)),

/* PMIC_I2C_SCL - RESERVED */
@@ -643,61 +643,61 @@
    /* GPIO_79 - AVS_DMIC_CLK_A1 */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_79, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_79,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(IGNORE)),

/* GPIO_80 - AVS_DMIC_CLK_B1 */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_80, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_80,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(IGNORE)),

/* GPIO_81 - AVS_DMIC_DATA_1 */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_81, DN_20K, DEEP, NF1, TxDRxE, ENPD), */
    _PAD_CFG_STRUCT(GPIO_81,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(TxDRxE) | PAD_IOSTERM(ENPD)),

/* GPIO_82 - AVS_DMIC_CLK_AB2 */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_82, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_82,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(IGNORE)),

/* GPIO_83 - AVS_DMIC_DATA_2 */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_83, DN_20K, DEEP, NF1, TxDRxE, ENPD), */
    _PAD_CFG_STRUCT(GPIO_83,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(TxDRxE) | PAD_IOSTERM(ENPD)),

/* GPIO_84 - AVS_I2S2_MCLK */
    /* PAD_CFG_NF(GPIO_84, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_84,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* GPIO_85 - AVS_I2S2_BCLK */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_85, DN_20K, DEEP, NF1, HIZCRx0, ENPD), */
    _PAD_CFG_STRUCT(GPIO_85,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(ENPD)),

/* GPIO_86 - AVS_I2S2_WS_SYNC */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_86, DN_20K, DEEP, NF1, HIZCRx0, ENPD), */
    _PAD_CFG_STRUCT(GPIO_86,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(ENPD)),

/* GPIO_87 - AVS_I2S2_SDI */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_87, UP_20K, DEEP, NF1, HIZCRx0, ENPD), */
    _PAD_CFG_STRUCT(GPIO_87,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(ENPD)),

/* GPIO_88 - AVS_I2S2_SDO */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_88, NONE, DEEP, NF1, HIZCRx0, ENPD), */
    _PAD_CFG_STRUCT(GPIO_88,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(ENPD)),

/* GPIO_89 - *GPIO */
@@ -723,7 +723,7 @@
    /* GPIO_97 - *FST_SPI_CS0_N */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_97, NATIVE, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_97,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(NATIVE) | PAD_IOSSTATE(IGNORE)),

/* GPIO_98 - GPIO */
@@ -734,13 +734,13 @@
    /* GPIO_99 - *FST_SPI_MOSI_IO0 */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_99, NATIVE, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_99,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(NATIVE) | PAD_IOSSTATE(IGNORE)),

/* GPIO_100 - *FST_SPI_MISO_IO1 */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_100, NATIVE, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_100,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(NATIVE) | PAD_IOSSTATE(IGNORE)),

/* GPIO_101 - GPIO */
@@ -756,109 +756,109 @@
    /* GPIO_103 - *FST_SPI_CLK */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_103, NATIVE, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_103,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(NATIVE) | PAD_IOSSTATE(IGNORE)),

/* FST_SPI_CLK_FB - *n/a */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(FST_SPI_CLK_FB, NONE, DEEP, NF1), */
    _PAD_CFG_STRUCT(FST_SPI_CLK_FB,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_IOSSTATE(IGNORE)),

/* GPIO_104 - SIO_SPI_0_CLK */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_104, DN_20K, DEEP, NF1, HIZCRx0, ENPD), */
    _PAD_CFG_STRUCT(GPIO_104,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(ENPD)),

/* GPIO_105 - SIO_SPI_0_FS0 */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_105, UP_20K, DEEP, NF1, HIZCRx0, ENPD), */
    _PAD_CFG_STRUCT(GPIO_105,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(ENPD)),

/* GPIO_106 - SIO_SPI_0_FS1 */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_106, UP_20K, DEEP, NF1, HIZCRx0, ENPD), */
    _PAD_CFG_STRUCT(GPIO_106,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(ENPD)),

/* GPIO_109 - SIO_SPI_0_RXD */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_109, UP_20K, DEEP, NF1, HIZCRx0, ENPD), */
    _PAD_CFG_STRUCT(GPIO_109,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(ENPD)),

/* GPIO_110 - SIO_SPI_0_TXD */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_110, UP_20K, DEEP, NF1, HIZCRx0, ENPD), */
    _PAD_CFG_STRUCT(GPIO_110,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(ENPD)),

/* GPIO_111 - SIO_SPI_1_CLK */
    /* PAD_CFG_NF(GPIO_111, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_111,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* GPIO_112 - SIO_SPI_1_FS0 */
    /* PAD_CFG_NF(GPIO_112, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_112,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* GPIO_113 - SIO_SPI_1_FS1 */
    /* PAD_CFG_NF(GPIO_113, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_113,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* GPIO_116 - SIO_SPI_1_RXD */
    /* PAD_CFG_NF_IOSSTATE(GPIO_116, DN_20K, DEEP, NF1, HIZCRx0), */
    _PAD_CFG_STRUCT(GPIO_116,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(HIZCRx0)),

/* GPIO_117 - SIO_SPI_1_TXD */
    /* PAD_CFG_NF(GPIO_117, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_117,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* GPIO_118 - SIO_SPI_2_CLK */
    /* PAD_CFG_NF(GPIO_118, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_118,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* GPIO_119 - SIO_SPI_2_FS0 */
    /* PAD_CFG_NF(GPIO_119, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_119,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* GPIO_120 - SIO_SPI_2_FS1 */
    /* PAD_CFG_NF(GPIO_120, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_120,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* GPIO_121 - SIO_SPI_2_FS2 */
    /* PAD_CFG_NF(GPIO_121, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_121,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* GPIO_122 - SIO_SPI_2_RXD */
    /* PAD_CFG_NF(GPIO_122, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_122,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* GPIO_123 - SIO_SPI_2_TXD */
    /* PAD_CFG_NF(GPIO_123, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_123,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/*  ------- GPIO Group West ------- */
@@ -866,204 +866,204 @@
    /* GPIO_124 - LPSS_I2C0_SDA */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_124, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), */
    _PAD_CFG_STRUCT(GPIO_124,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_1K) | PAD_IOSSTATE(Tx1RxDCRx1) | PAD_IOSTERM(ENPU)),

/* GPIO_125 - LPSS_I2C0_SCL */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_125, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), */
    _PAD_CFG_STRUCT(GPIO_125,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_1K) | PAD_IOSSTATE(Tx1RxDCRx1) | PAD_IOSTERM(ENPU)),

/* GPIO_126 - LPSS_I2C1_SDA */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_126, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), */
    _PAD_CFG_STRUCT(GPIO_126,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_1K) | PAD_IOSSTATE(Tx1RxDCRx1) | PAD_IOSTERM(ENPU)),

/* GPIO_127 - LPSS_I2C1_SCL */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_127, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), */
    _PAD_CFG_STRUCT(GPIO_127,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_1K) | PAD_IOSSTATE(Tx1RxDCRx1) | PAD_IOSTERM(ENPU)),

/* GPIO_128 - LPSS_I2C2_SDA */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_128, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), */
    _PAD_CFG_STRUCT(GPIO_128,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_1K) | PAD_IOSSTATE(Tx1RxDCRx1) | PAD_IOSTERM(ENPU)),

/* GPIO_129 - LPSS_I2C2_SCL */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_129, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), */
    _PAD_CFG_STRUCT(GPIO_129,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_1K) | PAD_IOSSTATE(Tx1RxDCRx1) | PAD_IOSTERM(ENPU)),

/* GPIO_130 - LPSS_I2C3_SDA */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_130, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), */
    _PAD_CFG_STRUCT(GPIO_130,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_1K) | PAD_IOSSTATE(Tx1RxDCRx1) | PAD_IOSTERM(ENPU)),

/* GPIO_131 - LPSS_I2C3_SCL */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_131, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), */
    _PAD_CFG_STRUCT(GPIO_131,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_1K) | PAD_IOSSTATE(Tx1RxDCRx1) | PAD_IOSTERM(ENPU)),

/* GPIO_132 - LPSS_I2C4_SDA */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_132, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), */
    _PAD_CFG_STRUCT(GPIO_132,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_1K) | PAD_IOSSTATE(Tx1RxDCRx1) | PAD_IOSTERM(ENPU)),

/* GPIO_133 - LPSS_I2C4_SCL */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_133, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), */
    _PAD_CFG_STRUCT(GPIO_133,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_1K) | PAD_IOSSTATE(Tx1RxDCRx1) | PAD_IOSTERM(ENPU)),

/* GPIO_134 - LPSS_I2C5_SDA */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_134, UP_20K, DEEP, NF1, HIZCRx0, ENPD), */
    _PAD_CFG_STRUCT(GPIO_134,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(ENPD)),

/* GPIO_135 - LPSS_I2C5_SCL */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_135, UP_20K, DEEP, NF1, HIZCRx0, ENPD), */
    _PAD_CFG_STRUCT(GPIO_135,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(ENPD)),

/* GPIO_136 - LPSS_I2C6_SDA */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_136, UP_20K, DEEP, NF1, HIZCRx0, ENPD), */
    _PAD_CFG_STRUCT(GPIO_136,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(ENPD)),

/* GPIO_137 - LPSS_I2C6_SCL */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_137, UP_20K, DEEP, NF1, HIZCRx0, ENPD), */
    _PAD_CFG_STRUCT(GPIO_137,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(ENPD)),

/* GPIO_138 - LPSS_I2C7_SDA */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_138, UP_1K, DEEP, NF1, Tx0RxDCRx0, ENPU), */
    _PAD_CFG_STRUCT(GPIO_138,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_1K) | PAD_IOSSTATE(Tx0RxDCRx0) | PAD_IOSTERM(ENPU)),

/* GPIO_139 - LPSS_I2C7_SCL */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_139, UP_1K, DEEP, NF1, Tx0RxDCRx0, ENPU), */
    _PAD_CFG_STRUCT(GPIO_139,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_1K) | PAD_IOSSTATE(Tx0RxDCRx0) | PAD_IOSTERM(ENPU)),

/* GPIO_146 - AVS_I2S6_BCLK */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_146, DN_20K, DEEP, NF2), */
    _PAD_CFG_STRUCT(GPIO_146,
-		PAD_FUNC(NF2) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF2) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(IGNORE)),

/* GPIO_147 - AVS_I2S6_WS_SYNC */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_147, DN_20K, DEEP, NF2), */
    _PAD_CFG_STRUCT(GPIO_147,
-		PAD_FUNC(NF2) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF2) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(IGNORE)),

/* GPIO_148 - AVS_I2S6_SDI */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_148, DN_20K, DEEP, NF2), */
    _PAD_CFG_STRUCT(GPIO_148,
-		PAD_FUNC(NF2) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF2) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(IGNORE)),

/* GPIO_149 - AVS_I2S6_SDO */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_149, DN_20K, DEEP, NF2), */
    _PAD_CFG_STRUCT(GPIO_149,
-		PAD_FUNC(NF2) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF2) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(IGNORE)),

/* GPIO_150 - AVS_I2S5_BCLK */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_150, DN_20K, DEEP, NF2, HIZCRx0, ENPD), */
    _PAD_CFG_STRUCT(GPIO_150,
-		PAD_FUNC(NF2) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF2) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(ENPD)),

/* GPIO_151 - AVS_I2S5_WS_SYNC */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_151, DN_20K, DEEP, NF2, HIZCRx0, ENPD), */
    _PAD_CFG_STRUCT(GPIO_151,
-		PAD_FUNC(NF2) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF2) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(ENPD)),

/* GPIO_152 - AVS_I2S5_SDI */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_152, DN_20K, DEEP, NF2, HIZCRx0, ENPD), */
    _PAD_CFG_STRUCT(GPIO_152,
-		PAD_FUNC(NF2) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF2) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(ENPD)),

/* GPIO_153 - AVS_I2S5_SDO */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_153, NONE, DEEP, NF2, HIZCRx0, ENPD), */
    _PAD_CFG_STRUCT(GPIO_153,
-		PAD_FUNC(NF2) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF2) | PAD_RESET(DEEP),
    	PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(ENPD)),

/* GPIO_154 - *GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_154, NONE, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(GPIO_154,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),

/* GPIO_155 - SPKR */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_155, DN_20K, DEEP, NF2), */
    _PAD_CFG_STRUCT(GPIO_155,
-		PAD_FUNC(NF2) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF2) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(IGNORE)),

/* GPIO_209 - *PCIE_CLKREQ0_N */
    /* PAD_CFG_NF(GPIO_209, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_209,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* GPIO_210 - *PCIE_CLKREQ1_N */
    /* PAD_CFG_NF(GPIO_210, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_210,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* GPIO_211 - *PCIE_CLKREQ2_N */
    /* PAD_CFG_NF(GPIO_211, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_211,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* GPIO_212 - *PCIE_CLKREQ3_N */
    /* PAD_CFG_NF(GPIO_212, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_212,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* OSC_CLK_OUT_0 - *OSC_CLK_OUT_0 */
    /* PAD_CFG_NF(OSC_CLK_OUT_0, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(OSC_CLK_OUT_0,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* OSC_CLK_OUT_1 - *OSC_CLK_OUT_1 */
    /* PAD_CFG_NF(OSC_CLK_OUT_1, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(OSC_CLK_OUT_1,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* OSC_CLK_OUT_2 - *OSC_CLK_OUT_2 */
    /* PAD_CFG_NF(OSC_CLK_OUT_2, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(OSC_CLK_OUT_2,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* OSC_CLK_OUT_3 - *OSC_CLK_OUT_3 */
    /* PAD_CFG_NF(OSC_CLK_OUT_3, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(OSC_CLK_OUT_3,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* OSC_CLK_OUT_4 - GPIO */
@@ -1074,53 +1074,53 @@
    /* PMU_AC_PRESENT - *GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(PMU_AC_PRESENT, NONE, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(PMU_AC_PRESENT,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),

/* PMU_BATLOW_B - GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(PMU_BATLOW_B, NONE, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(PMU_BATLOW_B,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),

/* PMU_PLTRST_B - *PMU_PLTRST_N */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_PLTRST_B, NONE, DEEP, NF1), */
    _PAD_CFG_STRUCT(PMU_PLTRST_B,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_IOSSTATE(IGNORE)),

/* PMU_PWRBTN_B - *PMU_PWRBTN_N */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_PWRBTN_B, UP_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(PMU_PWRBTN_B,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(IGNORE)),

/* PMU_RESETBUTTON_B - *PMU_RSTBTN_N */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_RESETBUTTON_B, NONE, DEEP, NF1), */
    _PAD_CFG_STRUCT(PMU_RESETBUTTON_B,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_IOSSTATE(IGNORE)),

/* PMU_SLP_S0_B - *PMU_SLP_S0_N */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_SLP_S0_B, NONE, DEEP, NF1), */
    _PAD_CFG_STRUCT(PMU_SLP_S0_B,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_IOSSTATE(IGNORE)),

/* PMU_SLP_S3_B - *PMU_SLP_S3_N */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_SLP_S3_B, NONE, DEEP, NF1), */
    _PAD_CFG_STRUCT(PMU_SLP_S3_B,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_IOSSTATE(IGNORE)),

/* PMU_SLP_S4_B - *PMU_SLP_S4_N */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_SLP_S4_B, NONE, DEEP, NF1), */
    _PAD_CFG_STRUCT(PMU_SLP_S4_B,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_IOSSTATE(IGNORE)),

/* PMU_SUSCLK - *PMU_SUSCLK */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_SUSCLK, NONE, DEEP, NF1), */
    _PAD_CFG_STRUCT(PMU_SUSCLK,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_IOSSTATE(IGNORE)),

/* PMU_WAKE_B - *GPIO */
@@ -1132,106 +1132,106 @@
    /* SUS_STAT_B - *SUS_STAT_B */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(SUS_STAT_B, NONE, DEEP, NF1), */
    _PAD_CFG_STRUCT(SUS_STAT_B,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_IOSSTATE(IGNORE)),

/* SUSPWRDNACK - GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(SUSPWRDNACK, NONE, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(SUSPWRDNACK,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),

/*  ------- GPIO Group South-West ------- */

/* GPIO_205 - PCIE_WAKE0_N */
    /* PAD_CFG_NF(GPIO_205, NONE, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_205,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1), 0),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP), 0),

/* GPIO_206 - PCIE_WAKE1_N */
    /* PAD_CFG_NF(GPIO_206, NONE, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_206,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1), 0),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP), 0),

/* GPIO_207 - PCIE_WAKE2_N */
    /* PAD_CFG_NF(GPIO_207, NONE, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_207,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1), 0),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP), 0),

/* GPIO_208 - PCIE_WAKE3_N */
    /* PAD_CFG_NF(GPIO_208, NONE, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_208,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1), 0),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP), 0),

/* GPIO_156 - *EMMC_CLK */
    /* PAD_CFG_NF_IOSSTATE(GPIO_156, DN_20K, DEEP, NF1, Tx0RxDCRx0), */
    _PAD_CFG_STRUCT(GPIO_156,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(Tx0RxDCRx0)),

/* GPIO_157 - *EMMC_D0 */
    /* PAD_CFG_NF_IOSSTATE(GPIO_157, UP_20K, DEEP, NF1, HIZCRx1), */
    _PAD_CFG_STRUCT(GPIO_157,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1)),

/* GPIO_158 - *EMMC_D1 */
    /* PAD_CFG_NF_IOSSTATE(GPIO_158, UP_20K, DEEP, NF1, HIZCRx1), */
    _PAD_CFG_STRUCT(GPIO_158,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1)),

/* GPIO_159 - *EMMC_D2 */
    /* PAD_CFG_NF_IOSSTATE(GPIO_159, UP_20K, DEEP, NF1, HIZCRx1), */
    _PAD_CFG_STRUCT(GPIO_159,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1)),

/* GPIO_160 - *EMMC_D3 */
    /* PAD_CFG_NF_IOSSTATE(GPIO_160, UP_20K, DEEP, NF1, HIZCRx1), */
    _PAD_CFG_STRUCT(GPIO_160,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1)),

/* GPIO_161 - *EMMC_D4 */
    /* PAD_CFG_NF_IOSSTATE(GPIO_161, UP_20K, DEEP, NF1, HIZCRx1), */
    _PAD_CFG_STRUCT(GPIO_161,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1)),

/* GPIO_162 - *EMMC_D5 */
    /* PAD_CFG_NF_IOSSTATE(GPIO_162, UP_20K, DEEP, NF1, HIZCRx1), */
    _PAD_CFG_STRUCT(GPIO_162,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1)),

/* GPIO_163 - *EMMC_D6 */
    /* PAD_CFG_NF_IOSSTATE(GPIO_163, UP_20K, DEEP, NF1, HIZCRx1), */
    _PAD_CFG_STRUCT(GPIO_163,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1)),

/* GPIO_164 - *EMMC_D7 */
    /* PAD_CFG_NF_IOSSTATE(GPIO_164, UP_20K, DEEP, NF1, HIZCRx1), */
    _PAD_CFG_STRUCT(GPIO_164,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1)),

/* GPIO_165 - *EMMC_CMD */
    /* PAD_CFG_NF_IOSSTATE(GPIO_165, UP_20K, DEEP, NF1, HIZCRx1), */
    _PAD_CFG_STRUCT(GPIO_165,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1)),

/* GPIO_166 - *GPIO */
    /* PAD_CFG_GPIO_HI_Z(GPIO_166, DN_20K, DEEP, TxLASTRxE, SAME), */
    _PAD_CFG_STRUCT(GPIO_166,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_BUF(TX_RX_DISABLE),
    	PAD_PULL(DN_20K)),

/* GPIO_167 - *GPIO */
    /* PAD_CFG_GPI_TRIG_IOSSTATE_OWN(GPIO_167, UP_20K, DEEP, OFF, HIZCRx1, ACPI), */
    _PAD_CFG_STRUCT(GPIO_167,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1)),

/* GPIO_168 - *GPIO */
@@ -1261,61 +1261,61 @@
    /* GPIO_172 - SDCARD_CLK */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_172, DN_20K, DEEP, NF1, HIZCRx1, DISPUPD), */
    _PAD_CFG_STRUCT(GPIO_172,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(HIZCRx1) | PAD_IOSTERM(DISPUPD)),

/* GPIO_179 - n/a */
    /* PAD_CFG_NF(GPIO_179, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_179,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* GPIO_173 - SDCARD_D0 */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_173, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), */
    _PAD_CFG_STRUCT(GPIO_173,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1) | PAD_IOSTERM(DISPUPD)),

/* GPIO_174 - SDCARD_D1 */
    /* PAD_CFG_NF_IOSSTATE(GPIO_174, UP_20K, DEEP, NF1, HIZCRx1), */
    _PAD_CFG_STRUCT(GPIO_174,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1)),

/* GPIO_175 - SDCARD_D2 */
    /* PAD_CFG_NF_IOSSTATE(GPIO_175, UP_20K, DEEP, NF1, HIZCRx1), */
    _PAD_CFG_STRUCT(GPIO_175,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1)),

/* GPIO_176 - SDCARD_D3 */
    /* PAD_CFG_NF_IOSSTATE(GPIO_176, UP_20K, DEEP, NF1, HIZCRx1), */
    _PAD_CFG_STRUCT(GPIO_176,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1)),

/* GPIO_177 - SDCARD_CD_B */
    /* PAD_CFG_NF(GPIO_177, UP_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_177,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K)),

/* GPIO_178 - SDCARD_CMD */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_178, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), */
    _PAD_CFG_STRUCT(GPIO_178,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1) | PAD_IOSTERM(DISPUPD)),

/* GPIO_186 - SDCARD_LVL_WP */
    /* PAD_CFG_NF(GPIO_186, UP_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_186,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K)),

/* GPIO_182 - *EMMC_RCLK */
    /* PAD_CFG_NF_IOSSTATE(GPIO_182, DN_20K, DEEP, NF1, HIZCRx0), */
    _PAD_CFG_STRUCT(GPIO_182,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(HIZCRx0)),

/* GPIO_183 - GPIO */
@@ -1327,73 +1327,73 @@
    /* SMB_ALERTB - SMB_ALERT_N */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(SMB_ALERTB, UP_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(SMB_ALERTB,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(IGNORE)),

/* SMB_CLK - SMB_CLK */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(SMB_CLK, UP_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(SMB_CLK,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(IGNORE)),

/* SMB_DATA - SMB_DATA */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(SMB_DATA, UP_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(SMB_DATA,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(IGNORE)),

/* LPC_ILB_SERIRQ - LPC_ILB_SERIRQ */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(LPC_ILB_SERIRQ, UP_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(LPC_ILB_SERIRQ,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(IGNORE)),

/* LPC_CLKOUT0 - LPC_CLKOUT0 */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_CLKOUT0, NONE, DEEP, NF1, HIZCRx1, DISPUPD), */
    _PAD_CFG_STRUCT(LPC_CLKOUT0,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_IOSSTATE(HIZCRx1) | PAD_IOSTERM(DISPUPD)),

/* LPC_CLKOUT1 - LPC_CLKOUT1 */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_CLKOUT1, NONE, DEEP, NF1, HIZCRx1, DISPUPD), */
    _PAD_CFG_STRUCT(LPC_CLKOUT1,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_IOSSTATE(HIZCRx1) | PAD_IOSTERM(DISPUPD)),

/* LPC_AD0 - LPC_AD0 */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD0, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), */
    _PAD_CFG_STRUCT(LPC_AD0,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1) | PAD_IOSTERM(DISPUPD)),

/* LPC_AD1 - LPC_AD1 */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD1, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), */
    _PAD_CFG_STRUCT(LPC_AD1,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1) | PAD_IOSTERM(DISPUPD)),

/* LPC_AD2 - LPC_AD2 */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD2, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), */
    _PAD_CFG_STRUCT(LPC_AD2,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1) | PAD_IOSTERM(DISPUPD)),

/* LPC_AD3 - LPC_AD3 */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD3, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), */
    _PAD_CFG_STRUCT(LPC_AD3,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1) | PAD_IOSTERM(DISPUPD)),

/* LPC_CLKRUNB - LPC_CLKRUNB */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_CLKRUNB, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), */
    _PAD_CFG_STRUCT(LPC_CLKRUNB,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1) | PAD_IOSTERM(DISPUPD)),

/* LPC_FRAMEB - LPC_FRAMEB */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_FRAMEB, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), */
    _PAD_CFG_STRUCT(LPC_FRAMEB,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1) | PAD_IOSTERM(DISPUPD)),
 };

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42915 )

Change subject: mb/up/squared: 2/3 Rewrite pad config using intelp2m
......................................................................

Patch Set 2:

(1 comment)

https://review.coreboot.org/c/coreboot/+/42915/2/src/mainboard/up/squared/gp... 
File src/mainboard/up/squared/gpio.h:

https://review.coreboot.org/c/coreboot/+/42915/2/src/mainboard/up/squared/gp... 
PS2, Line 100: 		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE),
line over 96 characters

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42915 )

Change subject: mb/up/squared: 2/3 Rewrite pad config using intelp2m
......................................................................

Patch Set 3:

(1 comment)

https://review.coreboot.org/c/coreboot/+/42915/3/src/mainboard/up/squared/gp... 
File src/mainboard/up/squared/gpio.h:

https://review.coreboot.org/c/coreboot/+/42915/3/src/mainboard/up/squared/gp... 
PS3, Line 100: 		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE),
line over 96 characters

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42915 )

Change subject: mb/up/squared: 2/3 Rewrite pad config using intelp2m
......................................................................

Patch Set 3:

(1 comment)

https://review.coreboot.org/c/coreboot/+/42915/3/src/mainboard/up/squared/gp... 
File src/mainboard/up/squared/gpio.h:

https://review.coreboot.org/c/coreboot/+/42915/3/src/mainboard/up/squared/gp... 
PS3, Line 100: 		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE),
line over 96 characters

Change in coreboot[master]: mb/up/squared/gpio: 2/3 Exclude fields that are not in PAD_CFG*

[Maxim Polyakov (Code Review)]

Hello build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/42915

to look at the new patch set (#4).

Change subject: mb/up/squared/gpio: 2/3 Exclude fields that are not in PAD_CFG*
......................................................................

mb/up/squared/gpio: 2/3 Exclude fields that are not in PAD_CFG*

This patch excludes bit fields that must be ignored in order to convert
current macros to target PAD_CFG_*() macros. The following commands
were used for this:

./intelp2m -ii -adv -ign -t 1 -p apl -file ./test/up-gpio.h

This is part of the patch set
"mb/up/squared: Rewrite pad config using intelp2m":

CB:42608 - 1/3 Decode raw register values
CB:42915 - 2/3 Exclude fields that are not in PAD_CFG*
CB:39765 - 3/3 Converts bit field macros to PAD_CFG

Change-Id: Ic9b6e63c1b84b97726886bef35c434dd9153eb78
Signed-off-by: Maxim Polyakov 
---
M src/mainboard/up/squared/gpio.h
1 file changed, 176 insertions(+), 176 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/42915/4

Change in coreboot[master]: mb/up/squared/gpio: 2/3 Exclude fields that are not in PAD_CFG*

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42915 )

Change subject: mb/up/squared/gpio: 2/3 Exclude fields that are not in PAD_CFG*
......................................................................

Patch Set 4:

(1 comment)

https://review.coreboot.org/c/coreboot/+/42915/4/src/mainboard/up/squared/gp... 
File src/mainboard/up/squared/gpio.h:

https://review.coreboot.org/c/coreboot/+/42915/4/src/mainboard/up/squared/gp... 
PS4, Line 100: 		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE),
line over 96 characters

Change in coreboot[master]: mb/up/squared/gpio: 2/3 Exclude fields that are not in PAD_CFG*

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42915 )

Change subject: mb/up/squared/gpio: 2/3 Exclude fields that are not in PAD_CFG*
......................................................................

Patch Set 5:

(1 comment)

https://review.coreboot.org/c/coreboot/+/42915/5/src/mainboard/up/squared/gp... 
File src/mainboard/up/squared/gpio.h:

https://review.coreboot.org/c/coreboot/+/42915/5/src/mainboard/up/squared/gp... 
PS5, Line 100: 		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE),
line over 96 characters

Change in coreboot[master]: mb/up/squared/gpio: 2/3 Exclude fields that are not in PAD_CFG*

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42915 )

Change subject: mb/up/squared/gpio: 2/3 Exclude fields that are not in PAD_CFG*
......................................................................

Patch Set 6:

(1 comment)

https://review.coreboot.org/c/coreboot/+/42915/6/src/mainboard/up/squared/gp... 
File src/mainboard/up/squared/gpio.h:

https://review.coreboot.org/c/coreboot/+/42915/6/src/mainboard/up/squared/gp... 
PS6, Line 100: 		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE),
line over 96 characters

Change in coreboot[master]: mb/up/squared/gpio: 2/3 Exclude fields that are not in PAD_CFG*

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42915 )

Change subject: mb/up/squared/gpio: 2/3 Exclude fields that are not in PAD_CFG*
......................................................................

Patch Set 7:

(1 comment)

https://review.coreboot.org/c/coreboot/+/42915/7/src/mainboard/up/squared/gp... 
File src/mainboard/up/squared/gpio.h:

https://review.coreboot.org/c/coreboot/+/42915/7/src/mainboard/up/squared/gp... 
PS7, Line 100: 		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE),
line over 96 characters

Change in coreboot[master]: mb/up/squared/gpio: 2/3 Exclude fields that are not in PAD_CFG*

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42915 )

Change subject: mb/up/squared/gpio: 2/3 Exclude fields that are not in PAD_CFG*
......................................................................

Patch Set 8:

(1 comment)

https://review.coreboot.org/c/coreboot/+/42915/8/src/mainboard/up/squared/gp... 
File src/mainboard/up/squared/gpio.h:

https://review.coreboot.org/c/coreboot/+/42915/8/src/mainboard/up/squared/gp... 
PS8, Line 100: 		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE),
line over 96 characters

Change in coreboot[master]: mb/up/squared/gpio: 2/3 Exclude fields that are not in PAD_CFG*

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42915 )

Change subject: mb/up/squared/gpio: 2/3 Exclude fields that are not in PAD_CFG*
......................................................................

Patch Set 9:

(1 comment)

https://review.coreboot.org/c/coreboot/+/42915/9/src/mainboard/up/squared/gp... 
File src/mainboard/up/squared/gpio.h:

https://review.coreboot.org/c/coreboot/+/42915/9/src/mainboard/up/squared/gp... 
PS9, Line 100: 		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE),
line over 96 characters

Change in coreboot[master]: mb/up/squared/gpio: 2/3 Exclude fields that are not in PAD_CFG*

[Maxim Polyakov (Code Review)]

Hello build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/42915

to look at the new patch set (#11).

Change subject: mb/up/squared/gpio: 2/3 Exclude fields that are not in PAD_CFG*
......................................................................

mb/up/squared/gpio: 2/3 Exclude fields that are not in PAD_CFG*

This patch excludes bit fields that must be ignored in order to convert
current macros to target PAD_CFG_*() macros. The following commands
were used for this:

./intelp2m -ii -fld cb -ign -t 1 -p apl -file ./up-gpio.h

This is part of the patch set
"mb/up/squared: Rewrite pad config using intelp2m":

CB:42608 - 1/3 Decode raw register values
CB:42915 - 2/3 Exclude fields that are not in PAD_CFG*
CB:39765 - 3/3 Converts bit field macros to PAD_CFG

Change-Id: Ic9b6e63c1b84b97726886bef35c434dd9153eb78
Signed-off-by: Maxim Polyakov 
---
M src/mainboard/up/squared/gpio.h
1 file changed, 176 insertions(+), 176 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/42915/11

Change in coreboot[master]: mb/up/squared/gpio: 2/3 Exclude fields that are not in PAD_CFG*

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42915 )

Change subject: mb/up/squared/gpio: 2/3 Exclude fields that are not in PAD_CFG*
......................................................................

Patch Set 11:

(1 comment)

https://review.coreboot.org/c/coreboot/+/42915/11/src/mainboard/up/squared/g... 
File src/mainboard/up/squared/gpio.h:

https://review.coreboot.org/c/coreboot/+/42915/11/src/mainboard/up/squared/g... 
PS11, Line 100: 		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE),
line over 96 characters

Change in coreboot[master]: mb/up/squared/gpio: 2/3 Exclude fields that are not in PAD_CFG*

[Michael Niewöhner (Code Review)]

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42915 )

Change subject: mb/up/squared/gpio: 2/3 Exclude fields that are not in PAD_CFG*
......................................................................

Patch Set 11: Code-Review+2

Change in coreboot[master]: mb/up/squared/gpio: 2/3 Exclude fields that are not in PAD_CFG*

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42915 )

Change subject: mb/up/squared/gpio: 2/3 Exclude fields that are not in PAD_CFG*
......................................................................

Patch Set 12:

(1 comment)

https://review.coreboot.org/c/coreboot/+/42915/12/src/mainboard/up/squared/g... 
File src/mainboard/up/squared/gpio.h:

https://review.coreboot.org/c/coreboot/+/42915/12/src/mainboard/up/squared/g... 
PS12, Line 100: 		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE),
line over 96 characters

Change in coreboot[master]: mb/up/squared/gpio: 2/3 Exclude fields that are not in PAD_CFG*

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/42915 )

Change subject: mb/up/squared/gpio: 2/3 Exclude fields that are not in PAD_CFG*
......................................................................

mb/up/squared/gpio: 2/3 Exclude fields that are not in PAD_CFG*

This patch excludes bit fields that must be ignored in order to convert
current macros to target PAD_CFG_*() macros. The following commands
were used for this:

./intelp2m -ii -fld cb -ign -t 1 -p apl -file ./up-gpio.h

This is part of the patch set
"mb/up/squared: Rewrite pad config using intelp2m":

CB:42608 - 1/3 Decode raw register values
CB:42915 - 2/3 Exclude fields that are not in PAD_CFG*
CB:39765 - 3/3 Converts bit field macros to PAD_CFG

Change-Id: Ic9b6e63c1b84b97726886bef35c434dd9153eb78
Signed-off-by: Maxim Polyakov 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42915
Tested-by: build bot (Jenkins) 
Reviewed-by: Michael Niewöhner
---
M src/mainboard/up/squared/gpio.h
1 file changed, 176 insertions(+), 176 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Michael Niewöhner: Looks good to me, approved

diff --git a/src/mainboard/up/squared/gpio.h b/src/mainboard/up/squared/gpio.h
index e4c0221..e2c7a96 100644
--- a/src/mainboard/up/squared/gpio.h
+++ b/src/mainboard/up/squared/gpio.h
@@ -17,12 +17,12 @@
    /* GPIO_0 - *GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_0, NONE, PWROK, OFF, ACPI), */
    _PAD_CFG_STRUCT(GPIO_0,
-		PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),
+		PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),

/* GPIO_1 - *GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_1, NONE, PWROK, OFF, ACPI), */
    _PAD_CFG_STRUCT(GPIO_1,
-		PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),
+		PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),

/* GPIO_2 - *GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_2, NONE, PWROK, OFF, ACPI), */
@@ -87,17 +87,17 @@
    /* GPIO_14 - *GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_14, NONE, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(GPIO_14,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),

/* GPIO_15 - *GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_15, NONE, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(GPIO_15,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),

/* GPIO_16 - *GPIO */
    /* PAD_CFG_GPI_SCI_IOS(GPIO_16, NONE, DEEP, LEVEL, INVERT, TxDRxE, SAME), */
    _PAD_CFG_STRUCT(GPIO_16,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 1),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE),
    	PAD_IOSSTATE(TxDRxE)),

/* GPIO_17 - *GPIO */
@@ -129,7 +129,7 @@
    /* GPIO_22 - *GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_22, NONE, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(GPIO_22,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),

/* GPIO_23 - *GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_23, NONE, DEEP, OFF, ACPI), */
@@ -139,12 +139,12 @@
    /* GPIO_24 - *GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_24, NONE, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(GPIO_24,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),

/* GPIO_25 - *GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_25, NONE, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(GPIO_25,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),

/* GPIO_26 - *GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_26, NONE, DEEP, OFF, ACPI), */
@@ -159,47 +159,47 @@
    /* GPIO_28 - *GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_28, UP_20K, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(GPIO_28,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE),
    	PAD_PULL(UP_20K)),

/* GPIO_29 - *GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_29, UP_20K, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(GPIO_29,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE),
    	PAD_PULL(UP_20K)),

/* GPIO_30 - *GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_30, UP_20K, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(GPIO_30,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE),
    	PAD_PULL(UP_20K)),

/* GPIO_31 - *GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_31, UP_20K, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(GPIO_31,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE),
    	PAD_PULL(UP_20K)),

/* GPIO_32 - *GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_32, NONE, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(GPIO_32,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),

/* GPIO_33 - *GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_33, NONE, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(GPIO_33,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),

/* GPIO_34 - PWM0 */
    /* PAD_CFG_NF(GPIO_34, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_34,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* GPIO_35 - PWM1 */
    /* PAD_CFG_NF(GPIO_35, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_35,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* GPIO_36 - *GPIO */
@@ -210,55 +210,55 @@
    /* GPIO_37 - PWM3 */
    /* PAD_CFG_NF(GPIO_37, DN_20K, PWROK, NF1), */
    _PAD_CFG_STRUCT(GPIO_37,
-		PAD_FUNC(NF1) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1),
    	PAD_PULL(DN_20K)),

/* GPIO_38 - LPSS_UART0_RXD */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_38, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), */
    _PAD_CFG_STRUCT(GPIO_38,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1) | PAD_IOSTERM(DISPUPD)),

/* GPIO_39 - LPSS_UART0_TXD */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD), */
    _PAD_CFG_STRUCT(GPIO_39,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSTERM(DISPUPD)),

/* GPIO_40 - LPSS_UART0_RTS_N */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_40, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD), */
    _PAD_CFG_STRUCT(GPIO_40,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSTERM(DISPUPD)),

/* GPIO_41 - LPSS_UART0_CTS_N */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_41, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), */
    _PAD_CFG_STRUCT(GPIO_41,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1) | PAD_IOSTERM(DISPUPD)),

/* GPIO_42 - LPSS_UART1_RXD */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_42, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), */
    _PAD_CFG_STRUCT(GPIO_42,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1) | PAD_IOSTERM(DISPUPD)),

/* GPIO_43 - LPSS_UART1_TXD */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_43, UP_20K, DEEP, NF1, HIZCRx0, DISPUPD), */
    _PAD_CFG_STRUCT(GPIO_43,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(DISPUPD)),

/* GPIO_44 - LPSS_UART1_RTS_N */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_44, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD), */
    _PAD_CFG_STRUCT(GPIO_44,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSTERM(DISPUPD)),

/* GPIO_45 - LPSS_UART1_CTS_N */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_45, NONE, DEEP, NF1, HIZCRx0, DISPUPD), */
    _PAD_CFG_STRUCT(GPIO_45,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(DISPUPD)),

/* GPIO_46 - *GPIO */
@@ -346,56 +346,56 @@
    /* TCK - *JTAG_TCK */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(TCK, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(TCK,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
-		PAD_PULL(DN_20K) | PAD_IOSSTATE(IGNORE) | (3 << 22)),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
+		PAD_PULL(DN_20K) | PAD_IOSSTATE(IGNORE)),

/* TRST_B - *JTAG_TRST_N */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(TRST_B, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(TRST_B,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
-		PAD_PULL(DN_20K) | PAD_IOSSTATE(IGNORE) | (3 << 22)),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
+		PAD_PULL(DN_20K) | PAD_IOSSTATE(IGNORE)),

/* TMS - *JTAG_TMS */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(TMS, UP_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(TMS,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
-		PAD_PULL(UP_20K) | PAD_IOSSTATE(IGNORE) | (3 << 22)),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
+		PAD_PULL(UP_20K) | PAD_IOSSTATE(IGNORE)),

/* TDI - *JTAG_TDI */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(TDI, UP_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(TDI,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
-		PAD_PULL(UP_20K) | PAD_IOSSTATE(IGNORE) | (3 << 22)),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
+		PAD_PULL(UP_20K) | PAD_IOSSTATE(IGNORE)),

/* CX_PMODE - *JTAG_PMODE */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(CX_PMODE, NONE, DEEP, NF1), */
    _PAD_CFG_STRUCT(CX_PMODE,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
-		PAD_IOSSTATE(IGNORE) | (3 << 22)),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
+		PAD_IOSSTATE(IGNORE)),

/* CX_PREQ_B - *JTAG_PREQ_N */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(CX_PREQ_B, UP_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(CX_PREQ_B,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
-		PAD_PULL(UP_20K) | PAD_IOSSTATE(IGNORE) | (3 << 22)),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
+		PAD_PULL(UP_20K) | PAD_IOSSTATE(IGNORE)),

/* JTAGX - *JTAGX */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(JTAGX, UP_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(JTAGX,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
-		PAD_PULL(UP_20K) | PAD_IOSSTATE(IGNORE) | (3 << 22)),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
+		PAD_PULL(UP_20K) | PAD_IOSSTATE(IGNORE)),

/* CX_PRDY_B - *JTAG_PRDY_N */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(CX_PRDY_B, UP_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(CX_PRDY_B,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
-		PAD_PULL(UP_20K) | PAD_IOSSTATE(IGNORE) | (1 << 22)),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
+		PAD_PULL(UP_20K) | PAD_IOSSTATE(IGNORE)),

/* TDO - *JTAG_TDO */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(TDO, UP_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(TDO,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
-		PAD_PULL(UP_20K) | PAD_IOSSTATE(IGNORE) | (1 << 22)),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
+		PAD_PULL(UP_20K) | PAD_IOSSTATE(IGNORE)),

/* CNV_BRI_DT - GPIO */
    /* PAD_CFG_GPO_IOSSTATE_IOSTERM(CNV_BRI_DT, 1, DEEP, DN_20K, IGNORE, SAME), */
@@ -436,25 +436,25 @@
    /* GPIO_187 - *DDI0_DDC_SDA */
    /* PAD_CFG_NF_IOSSTATE(GPIO_187, UP_20K, DEEP, NF1, HIZCRx0), */
    _PAD_CFG_STRUCT(GPIO_187,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx0)),

/* GPIO_188 - *DDI0_DDC_SCL */
    /* PAD_CFG_NF_IOSSTATE(GPIO_188, UP_20K, DEEP, NF1, HIZCRx0), */
    _PAD_CFG_STRUCT(GPIO_188,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx0)),

/* GPIO_189 - *DDI1_DDC_SDA */
    /* PAD_CFG_NF(GPIO_189, UP_2K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_189,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_2K)),

/* GPIO_190 - *DDI1_DDC_SCL */
    /* PAD_CFG_NF(GPIO_190, UP_2K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_190,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_2K)),

/* GPIO_191 - GPIO */
@@ -470,19 +470,19 @@
    /* GPIO_193 - *PNL0_VDDEN */
    /* PAD_CFG_NF_IOSSTATE(GPIO_193, DN_20K, DEEP, NF1, Tx0RxDCRx0), */
    _PAD_CFG_STRUCT(GPIO_193,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(Tx0RxDCRx0)),

/* GPIO_194 - *PNL0_BKLTEN */
    /* PAD_CFG_NF_IOSSTATE(GPIO_194, DN_20K, DEEP, NF1, Tx0RxDCRx0), */
    _PAD_CFG_STRUCT(GPIO_194,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(Tx0RxDCRx0)),

/* GPIO_195 - *PNL0_BKLTCTL */
    /* PAD_CFG_NF_IOSSTATE(GPIO_195, DN_20K, DEEP, NF1, Tx0RxDCRx0), */
    _PAD_CFG_STRUCT(GPIO_195,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(Tx0RxDCRx0)),

/* GPIO_196 - GPIO */
@@ -503,13 +503,13 @@
    /* GPIO_199 - DDI1_HPD */
    /* PAD_CFG_NF(GPIO_199, UP_20K, DEEP, NF2), */
    _PAD_CFG_STRUCT(GPIO_199,
-		PAD_FUNC(NF2) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF2) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K)),

/* GPIO_200 - DDI0_HPD */
    /* PAD_CFG_NF(GPIO_200, UP_20K, DEEP, NF2), */
    _PAD_CFG_STRUCT(GPIO_200,
-		PAD_FUNC(NF2) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF2) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K)),

/* GPIO_201 - GPIO */
@@ -525,28 +525,28 @@
    /* GPIO_203 - GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_203, NONE, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(GPIO_203,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),

/* GPIO_204 - GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_204, NONE, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(GPIO_204,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),

/* PMC_SPI_FS0 - GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(PMC_SPI_FS0, NONE, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(PMC_SPI_FS0,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),

/* PMC_SPI_FS1 - DDI2_HPD */
    /* PAD_CFG_NF(PMC_SPI_FS1, UP_20K, DEEP, NF2), */
    _PAD_CFG_STRUCT(PMC_SPI_FS1,
-		PAD_FUNC(NF2) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF2) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K)),

/* PMC_SPI_FS2 - GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(PMC_SPI_FS2, NONE, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(PMC_SPI_FS2,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),

/* PMC_SPI_RXD - GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(PMC_SPI_RXD, NONE, DEEP, OFF, ACPI), */
@@ -566,13 +566,13 @@
    /* PMIC_PWRGOOD - GPIO */
    /* PAD_CFG_TERM_GPO(PMIC_PWRGOOD, 1, UP_1K, DEEP), */
    _PAD_CFG_STRUCT(PMIC_PWRGOOD,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | (1 << 1) | 1,
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1,
    	PAD_PULL(UP_1K)),

/* PMIC_RESET_B - GPIO */
    /* PAD_CFG_GPI_TRIG_IOSSTATE_OWN(PMIC_RESET_B, NONE, DEEP, OFF, IGNORE, ACPI), */
    _PAD_CFG_STRUCT(PMIC_RESET_B,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE),
    	PAD_IOSSTATE(IGNORE)),

/* GPIO_213 - GPIO */
@@ -584,7 +584,7 @@
    /* GPIO_214 - GPIO */
    /* PAD_CFG_GPI_TRIG_IOS_OWN(GPIO_214, UP_20K, DEEP, OFF, TxLASTRxE, ENPU, ACPI), */
    _PAD_CFG_STRUCT(GPIO_214,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE),
    	PAD_PULL(UP_20K) | PAD_IOSTERM(ENPU)),

/* GPIO_215 - GPIO */
@@ -596,7 +596,7 @@
    /* PMIC_THERMTRIP_B - *THERMTRIP_N */
    /* PAD_CFG_NF(PMIC_THERMTRIP_B, UP_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(PMIC_THERMTRIP_B,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K)),

/* PMIC_STDBY - GPIO */
@@ -608,7 +608,7 @@
    /* PROCHOT_B - *PROCHOT_N */
    /* PAD_CFG_NF_IOSSTATE(PROCHOT_B, UP_20K, DEEP, NF1, HIZCRx1), */
    _PAD_CFG_STRUCT(PROCHOT_B,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1)),

/* PMIC_I2C_SCL - RESERVED */
@@ -643,61 +643,61 @@
    /* GPIO_79 - AVS_DMIC_CLK_A1 */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_79, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_79,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(IGNORE)),

/* GPIO_80 - AVS_DMIC_CLK_B1 */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_80, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_80,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(IGNORE)),

/* GPIO_81 - AVS_DMIC_DATA_1 */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_81, DN_20K, DEEP, NF1, TxDRxE, ENPD), */
    _PAD_CFG_STRUCT(GPIO_81,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(TxDRxE) | PAD_IOSTERM(ENPD)),

/* GPIO_82 - AVS_DMIC_CLK_AB2 */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_82, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_82,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(IGNORE)),

/* GPIO_83 - AVS_DMIC_DATA_2 */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_83, DN_20K, DEEP, NF1, TxDRxE, ENPD), */
    _PAD_CFG_STRUCT(GPIO_83,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(TxDRxE) | PAD_IOSTERM(ENPD)),

/* GPIO_84 - AVS_I2S2_MCLK */
    /* PAD_CFG_NF(GPIO_84, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_84,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* GPIO_85 - AVS_I2S2_BCLK */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_85, DN_20K, DEEP, NF1, HIZCRx0, ENPD), */
    _PAD_CFG_STRUCT(GPIO_85,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(ENPD)),

/* GPIO_86 - AVS_I2S2_WS_SYNC */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_86, DN_20K, DEEP, NF1, HIZCRx0, ENPD), */
    _PAD_CFG_STRUCT(GPIO_86,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(ENPD)),

/* GPIO_87 - AVS_I2S2_SDI */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_87, UP_20K, DEEP, NF1, HIZCRx0, ENPD), */
    _PAD_CFG_STRUCT(GPIO_87,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(ENPD)),

/* GPIO_88 - AVS_I2S2_SDO */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_88, NONE, DEEP, NF1, HIZCRx0, ENPD), */
    _PAD_CFG_STRUCT(GPIO_88,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(ENPD)),

/* GPIO_89 - *GPIO */
@@ -723,7 +723,7 @@
    /* GPIO_97 - *FST_SPI_CS0_N */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_97, NATIVE, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_97,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(NATIVE) | PAD_IOSSTATE(IGNORE)),

/* GPIO_98 - GPIO */
@@ -734,13 +734,13 @@
    /* GPIO_99 - *FST_SPI_MOSI_IO0 */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_99, NATIVE, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_99,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(NATIVE) | PAD_IOSSTATE(IGNORE)),

/* GPIO_100 - *FST_SPI_MISO_IO1 */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_100, NATIVE, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_100,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(NATIVE) | PAD_IOSSTATE(IGNORE)),

/* GPIO_101 - GPIO */
@@ -756,109 +756,109 @@
    /* GPIO_103 - *FST_SPI_CLK */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_103, NATIVE, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_103,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(NATIVE) | PAD_IOSSTATE(IGNORE)),

/* FST_SPI_CLK_FB - *n/a */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(FST_SPI_CLK_FB, NONE, DEEP, NF1), */
    _PAD_CFG_STRUCT(FST_SPI_CLK_FB,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_IOSSTATE(IGNORE)),

/* GPIO_104 - SIO_SPI_0_CLK */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_104, DN_20K, DEEP, NF1, HIZCRx0, ENPD), */
    _PAD_CFG_STRUCT(GPIO_104,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(ENPD)),

/* GPIO_105 - SIO_SPI_0_FS0 */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_105, UP_20K, DEEP, NF1, HIZCRx0, ENPD), */
    _PAD_CFG_STRUCT(GPIO_105,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(ENPD)),

/* GPIO_106 - SIO_SPI_0_FS1 */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_106, UP_20K, DEEP, NF1, HIZCRx0, ENPD), */
    _PAD_CFG_STRUCT(GPIO_106,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(ENPD)),

/* GPIO_109 - SIO_SPI_0_RXD */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_109, UP_20K, DEEP, NF1, HIZCRx0, ENPD), */
    _PAD_CFG_STRUCT(GPIO_109,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(ENPD)),

/* GPIO_110 - SIO_SPI_0_TXD */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_110, UP_20K, DEEP, NF1, HIZCRx0, ENPD), */
    _PAD_CFG_STRUCT(GPIO_110,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(ENPD)),

/* GPIO_111 - SIO_SPI_1_CLK */
    /* PAD_CFG_NF(GPIO_111, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_111,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* GPIO_112 - SIO_SPI_1_FS0 */
    /* PAD_CFG_NF(GPIO_112, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_112,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* GPIO_113 - SIO_SPI_1_FS1 */
    /* PAD_CFG_NF(GPIO_113, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_113,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* GPIO_116 - SIO_SPI_1_RXD */
    /* PAD_CFG_NF_IOSSTATE(GPIO_116, DN_20K, DEEP, NF1, HIZCRx0), */
    _PAD_CFG_STRUCT(GPIO_116,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(HIZCRx0)),

/* GPIO_117 - SIO_SPI_1_TXD */
    /* PAD_CFG_NF(GPIO_117, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_117,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* GPIO_118 - SIO_SPI_2_CLK */
    /* PAD_CFG_NF(GPIO_118, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_118,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* GPIO_119 - SIO_SPI_2_FS0 */
    /* PAD_CFG_NF(GPIO_119, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_119,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* GPIO_120 - SIO_SPI_2_FS1 */
    /* PAD_CFG_NF(GPIO_120, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_120,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* GPIO_121 - SIO_SPI_2_FS2 */
    /* PAD_CFG_NF(GPIO_121, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_121,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* GPIO_122 - SIO_SPI_2_RXD */
    /* PAD_CFG_NF(GPIO_122, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_122,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* GPIO_123 - SIO_SPI_2_TXD */
    /* PAD_CFG_NF(GPIO_123, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_123,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/*  ------- GPIO Group West ------- */
@@ -866,204 +866,204 @@
    /* GPIO_124 - LPSS_I2C0_SDA */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_124, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), */
    _PAD_CFG_STRUCT(GPIO_124,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_1K) | PAD_IOSSTATE(Tx1RxDCRx1) | PAD_IOSTERM(ENPU)),

/* GPIO_125 - LPSS_I2C0_SCL */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_125, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), */
    _PAD_CFG_STRUCT(GPIO_125,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_1K) | PAD_IOSSTATE(Tx1RxDCRx1) | PAD_IOSTERM(ENPU)),

/* GPIO_126 - LPSS_I2C1_SDA */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_126, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), */
    _PAD_CFG_STRUCT(GPIO_126,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_1K) | PAD_IOSSTATE(Tx1RxDCRx1) | PAD_IOSTERM(ENPU)),

/* GPIO_127 - LPSS_I2C1_SCL */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_127, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), */
    _PAD_CFG_STRUCT(GPIO_127,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_1K) | PAD_IOSSTATE(Tx1RxDCRx1) | PAD_IOSTERM(ENPU)),

/* GPIO_128 - LPSS_I2C2_SDA */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_128, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), */
    _PAD_CFG_STRUCT(GPIO_128,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_1K) | PAD_IOSSTATE(Tx1RxDCRx1) | PAD_IOSTERM(ENPU)),

/* GPIO_129 - LPSS_I2C2_SCL */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_129, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), */
    _PAD_CFG_STRUCT(GPIO_129,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_1K) | PAD_IOSSTATE(Tx1RxDCRx1) | PAD_IOSTERM(ENPU)),

/* GPIO_130 - LPSS_I2C3_SDA */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_130, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), */
    _PAD_CFG_STRUCT(GPIO_130,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_1K) | PAD_IOSSTATE(Tx1RxDCRx1) | PAD_IOSTERM(ENPU)),

/* GPIO_131 - LPSS_I2C3_SCL */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_131, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), */
    _PAD_CFG_STRUCT(GPIO_131,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_1K) | PAD_IOSSTATE(Tx1RxDCRx1) | PAD_IOSTERM(ENPU)),

/* GPIO_132 - LPSS_I2C4_SDA */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_132, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), */
    _PAD_CFG_STRUCT(GPIO_132,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_1K) | PAD_IOSSTATE(Tx1RxDCRx1) | PAD_IOSTERM(ENPU)),

/* GPIO_133 - LPSS_I2C4_SCL */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_133, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), */
    _PAD_CFG_STRUCT(GPIO_133,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_1K) | PAD_IOSSTATE(Tx1RxDCRx1) | PAD_IOSTERM(ENPU)),

/* GPIO_134 - LPSS_I2C5_SDA */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_134, UP_20K, DEEP, NF1, HIZCRx0, ENPD), */
    _PAD_CFG_STRUCT(GPIO_134,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(ENPD)),

/* GPIO_135 - LPSS_I2C5_SCL */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_135, UP_20K, DEEP, NF1, HIZCRx0, ENPD), */
    _PAD_CFG_STRUCT(GPIO_135,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(ENPD)),

/* GPIO_136 - LPSS_I2C6_SDA */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_136, UP_20K, DEEP, NF1, HIZCRx0, ENPD), */
    _PAD_CFG_STRUCT(GPIO_136,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(ENPD)),

/* GPIO_137 - LPSS_I2C6_SCL */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_137, UP_20K, DEEP, NF1, HIZCRx0, ENPD), */
    _PAD_CFG_STRUCT(GPIO_137,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(ENPD)),

/* GPIO_138 - LPSS_I2C7_SDA */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_138, UP_1K, DEEP, NF1, Tx0RxDCRx0, ENPU), */
    _PAD_CFG_STRUCT(GPIO_138,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_1K) | PAD_IOSSTATE(Tx0RxDCRx0) | PAD_IOSTERM(ENPU)),

/* GPIO_139 - LPSS_I2C7_SCL */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_139, UP_1K, DEEP, NF1, Tx0RxDCRx0, ENPU), */
    _PAD_CFG_STRUCT(GPIO_139,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_1K) | PAD_IOSSTATE(Tx0RxDCRx0) | PAD_IOSTERM(ENPU)),

/* GPIO_146 - AVS_I2S6_BCLK */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_146, DN_20K, DEEP, NF2), */
    _PAD_CFG_STRUCT(GPIO_146,
-		PAD_FUNC(NF2) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF2) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(IGNORE)),

/* GPIO_147 - AVS_I2S6_WS_SYNC */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_147, DN_20K, DEEP, NF2), */
    _PAD_CFG_STRUCT(GPIO_147,
-		PAD_FUNC(NF2) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF2) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(IGNORE)),

/* GPIO_148 - AVS_I2S6_SDI */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_148, DN_20K, DEEP, NF2), */
    _PAD_CFG_STRUCT(GPIO_148,
-		PAD_FUNC(NF2) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF2) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(IGNORE)),

/* GPIO_149 - AVS_I2S6_SDO */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_149, DN_20K, DEEP, NF2), */
    _PAD_CFG_STRUCT(GPIO_149,
-		PAD_FUNC(NF2) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF2) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(IGNORE)),

/* GPIO_150 - AVS_I2S5_BCLK */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_150, DN_20K, DEEP, NF2, HIZCRx0, ENPD), */
    _PAD_CFG_STRUCT(GPIO_150,
-		PAD_FUNC(NF2) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF2) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(ENPD)),

/* GPIO_151 - AVS_I2S5_WS_SYNC */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_151, DN_20K, DEEP, NF2, HIZCRx0, ENPD), */
    _PAD_CFG_STRUCT(GPIO_151,
-		PAD_FUNC(NF2) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF2) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(ENPD)),

/* GPIO_152 - AVS_I2S5_SDI */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_152, DN_20K, DEEP, NF2, HIZCRx0, ENPD), */
    _PAD_CFG_STRUCT(GPIO_152,
-		PAD_FUNC(NF2) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF2) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(ENPD)),

/* GPIO_153 - AVS_I2S5_SDO */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_153, NONE, DEEP, NF2, HIZCRx0, ENPD), */
    _PAD_CFG_STRUCT(GPIO_153,
-		PAD_FUNC(NF2) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF2) | PAD_RESET(DEEP),
    	PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(ENPD)),

/* GPIO_154 - *GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(GPIO_154, NONE, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(GPIO_154,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),

/* GPIO_155 - SPKR */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_155, DN_20K, DEEP, NF2), */
    _PAD_CFG_STRUCT(GPIO_155,
-		PAD_FUNC(NF2) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF2) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(IGNORE)),

/* GPIO_209 - *PCIE_CLKREQ0_N */
    /* PAD_CFG_NF(GPIO_209, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_209,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* GPIO_210 - *PCIE_CLKREQ1_N */
    /* PAD_CFG_NF(GPIO_210, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_210,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* GPIO_211 - *PCIE_CLKREQ2_N */
    /* PAD_CFG_NF(GPIO_211, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_211,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* GPIO_212 - *PCIE_CLKREQ3_N */
    /* PAD_CFG_NF(GPIO_212, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_212,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* OSC_CLK_OUT_0 - *OSC_CLK_OUT_0 */
    /* PAD_CFG_NF(OSC_CLK_OUT_0, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(OSC_CLK_OUT_0,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* OSC_CLK_OUT_1 - *OSC_CLK_OUT_1 */
    /* PAD_CFG_NF(OSC_CLK_OUT_1, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(OSC_CLK_OUT_1,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* OSC_CLK_OUT_2 - *OSC_CLK_OUT_2 */
    /* PAD_CFG_NF(OSC_CLK_OUT_2, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(OSC_CLK_OUT_2,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* OSC_CLK_OUT_3 - *OSC_CLK_OUT_3 */
    /* PAD_CFG_NF(OSC_CLK_OUT_3, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(OSC_CLK_OUT_3,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* OSC_CLK_OUT_4 - GPIO */
@@ -1074,53 +1074,53 @@
    /* PMU_AC_PRESENT - *GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(PMU_AC_PRESENT, NONE, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(PMU_AC_PRESENT,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),

/* PMU_BATLOW_B - GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(PMU_BATLOW_B, NONE, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(PMU_BATLOW_B,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),

/* PMU_PLTRST_B - *PMU_PLTRST_N */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_PLTRST_B, NONE, DEEP, NF1), */
    _PAD_CFG_STRUCT(PMU_PLTRST_B,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_IOSSTATE(IGNORE)),

/* PMU_PWRBTN_B - *PMU_PWRBTN_N */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_PWRBTN_B, UP_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(PMU_PWRBTN_B,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(IGNORE)),

/* PMU_RESETBUTTON_B - *PMU_RSTBTN_N */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_RESETBUTTON_B, NONE, DEEP, NF1), */
    _PAD_CFG_STRUCT(PMU_RESETBUTTON_B,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_IOSSTATE(IGNORE)),

/* PMU_SLP_S0_B - *PMU_SLP_S0_N */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_SLP_S0_B, NONE, DEEP, NF1), */
    _PAD_CFG_STRUCT(PMU_SLP_S0_B,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_IOSSTATE(IGNORE)),

/* PMU_SLP_S3_B - *PMU_SLP_S3_N */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_SLP_S3_B, NONE, DEEP, NF1), */
    _PAD_CFG_STRUCT(PMU_SLP_S3_B,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_IOSSTATE(IGNORE)),

/* PMU_SLP_S4_B - *PMU_SLP_S4_N */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_SLP_S4_B, NONE, DEEP, NF1), */
    _PAD_CFG_STRUCT(PMU_SLP_S4_B,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_IOSSTATE(IGNORE)),

/* PMU_SUSCLK - *PMU_SUSCLK */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_SUSCLK, NONE, DEEP, NF1), */
    _PAD_CFG_STRUCT(PMU_SUSCLK,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_IOSSTATE(IGNORE)),

/* PMU_WAKE_B - *GPIO */
@@ -1132,106 +1132,106 @@
    /* SUS_STAT_B - *SUS_STAT_B */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(SUS_STAT_B, NONE, DEEP, NF1), */
    _PAD_CFG_STRUCT(SUS_STAT_B,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_IOSSTATE(IGNORE)),

/* SUSPWRDNACK - GPIO */
    /* PAD_CFG_GPI_TRIG_OWN(SUSPWRDNACK, NONE, DEEP, OFF, ACPI), */
    _PAD_CFG_STRUCT(SUSPWRDNACK,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),

/*  ------- GPIO Group South-West ------- */

/* GPIO_205 - PCIE_WAKE0_N */
    /* PAD_CFG_NF(GPIO_205, NONE, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_205,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1), 0),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP), 0),

/* GPIO_206 - PCIE_WAKE1_N */
    /* PAD_CFG_NF(GPIO_206, NONE, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_206,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1), 0),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP), 0),

/* GPIO_207 - PCIE_WAKE2_N */
    /* PAD_CFG_NF(GPIO_207, NONE, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_207,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1), 0),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP), 0),

/* GPIO_208 - PCIE_WAKE3_N */
    /* PAD_CFG_NF(GPIO_208, NONE, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_208,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1), 0),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP), 0),

/* GPIO_156 - *EMMC_CLK */
    /* PAD_CFG_NF_IOSSTATE(GPIO_156, DN_20K, DEEP, NF1, Tx0RxDCRx0), */
    _PAD_CFG_STRUCT(GPIO_156,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(Tx0RxDCRx0)),

/* GPIO_157 - *EMMC_D0 */
    /* PAD_CFG_NF_IOSSTATE(GPIO_157, UP_20K, DEEP, NF1, HIZCRx1), */
    _PAD_CFG_STRUCT(GPIO_157,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1)),

/* GPIO_158 - *EMMC_D1 */
    /* PAD_CFG_NF_IOSSTATE(GPIO_158, UP_20K, DEEP, NF1, HIZCRx1), */
    _PAD_CFG_STRUCT(GPIO_158,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1)),

/* GPIO_159 - *EMMC_D2 */
    /* PAD_CFG_NF_IOSSTATE(GPIO_159, UP_20K, DEEP, NF1, HIZCRx1), */
    _PAD_CFG_STRUCT(GPIO_159,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1)),

/* GPIO_160 - *EMMC_D3 */
    /* PAD_CFG_NF_IOSSTATE(GPIO_160, UP_20K, DEEP, NF1, HIZCRx1), */
    _PAD_CFG_STRUCT(GPIO_160,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1)),

/* GPIO_161 - *EMMC_D4 */
    /* PAD_CFG_NF_IOSSTATE(GPIO_161, UP_20K, DEEP, NF1, HIZCRx1), */
    _PAD_CFG_STRUCT(GPIO_161,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1)),

/* GPIO_162 - *EMMC_D5 */
    /* PAD_CFG_NF_IOSSTATE(GPIO_162, UP_20K, DEEP, NF1, HIZCRx1), */
    _PAD_CFG_STRUCT(GPIO_162,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1)),

/* GPIO_163 - *EMMC_D6 */
    /* PAD_CFG_NF_IOSSTATE(GPIO_163, UP_20K, DEEP, NF1, HIZCRx1), */
    _PAD_CFG_STRUCT(GPIO_163,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1)),

/* GPIO_164 - *EMMC_D7 */
    /* PAD_CFG_NF_IOSSTATE(GPIO_164, UP_20K, DEEP, NF1, HIZCRx1), */
    _PAD_CFG_STRUCT(GPIO_164,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1)),

/* GPIO_165 - *EMMC_CMD */
    /* PAD_CFG_NF_IOSSTATE(GPIO_165, UP_20K, DEEP, NF1, HIZCRx1), */
    _PAD_CFG_STRUCT(GPIO_165,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1)),

/* GPIO_166 - *GPIO */
    /* PAD_CFG_GPIO_HI_Z(GPIO_166, DN_20K, DEEP, TxLASTRxE, SAME), */
    _PAD_CFG_STRUCT(GPIO_166,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_BUF(TX_RX_DISABLE),
    	PAD_PULL(DN_20K)),

/* GPIO_167 - *GPIO */
    /* PAD_CFG_GPI_TRIG_IOSSTATE_OWN(GPIO_167, UP_20K, DEEP, OFF, HIZCRx1, ACPI), */
    _PAD_CFG_STRUCT(GPIO_167,
-		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1),
+		PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1)),

/* GPIO_168 - *GPIO */
@@ -1261,61 +1261,61 @@
    /* GPIO_172 - SDCARD_CLK */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_172, DN_20K, DEEP, NF1, HIZCRx1, DISPUPD), */
    _PAD_CFG_STRUCT(GPIO_172,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(HIZCRx1) | PAD_IOSTERM(DISPUPD)),

/* GPIO_179 - n/a */
    /* PAD_CFG_NF(GPIO_179, DN_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_179,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K)),

/* GPIO_173 - SDCARD_D0 */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_173, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), */
    _PAD_CFG_STRUCT(GPIO_173,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1) | PAD_IOSTERM(DISPUPD)),

/* GPIO_174 - SDCARD_D1 */
    /* PAD_CFG_NF_IOSSTATE(GPIO_174, UP_20K, DEEP, NF1, HIZCRx1), */
    _PAD_CFG_STRUCT(GPIO_174,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1)),

/* GPIO_175 - SDCARD_D2 */
    /* PAD_CFG_NF_IOSSTATE(GPIO_175, UP_20K, DEEP, NF1, HIZCRx1), */
    _PAD_CFG_STRUCT(GPIO_175,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1)),

/* GPIO_176 - SDCARD_D3 */
    /* PAD_CFG_NF_IOSSTATE(GPIO_176, UP_20K, DEEP, NF1, HIZCRx1), */
    _PAD_CFG_STRUCT(GPIO_176,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1)),

/* GPIO_177 - SDCARD_CD_B */
    /* PAD_CFG_NF(GPIO_177, UP_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_177,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K)),

/* GPIO_178 - SDCARD_CMD */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_178, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), */
    _PAD_CFG_STRUCT(GPIO_178,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1) | PAD_IOSTERM(DISPUPD)),

/* GPIO_186 - SDCARD_LVL_WP */
    /* PAD_CFG_NF(GPIO_186, UP_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(GPIO_186,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K)),

/* GPIO_182 - *EMMC_RCLK */
    /* PAD_CFG_NF_IOSSTATE(GPIO_182, DN_20K, DEEP, NF1, HIZCRx0), */
    _PAD_CFG_STRUCT(GPIO_182,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(DN_20K) | PAD_IOSSTATE(HIZCRx0)),

/* GPIO_183 - GPIO */
@@ -1327,73 +1327,73 @@
    /* SMB_ALERTB - SMB_ALERT_N */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(SMB_ALERTB, UP_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(SMB_ALERTB,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(IGNORE)),

/* SMB_CLK - SMB_CLK */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(SMB_CLK, UP_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(SMB_CLK,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(IGNORE)),

/* SMB_DATA - SMB_DATA */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(SMB_DATA, UP_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(SMB_DATA,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(IGNORE)),

/* LPC_ILB_SERIRQ - LPC_ILB_SERIRQ */
    /* PAD_CFG_NF_IOSTANDBY_IGNORE(LPC_ILB_SERIRQ, UP_20K, DEEP, NF1), */
    _PAD_CFG_STRUCT(LPC_ILB_SERIRQ,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(IGNORE)),

/* LPC_CLKOUT0 - LPC_CLKOUT0 */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_CLKOUT0, NONE, DEEP, NF1, HIZCRx1, DISPUPD), */
    _PAD_CFG_STRUCT(LPC_CLKOUT0,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_IOSSTATE(HIZCRx1) | PAD_IOSTERM(DISPUPD)),

/* LPC_CLKOUT1 - LPC_CLKOUT1 */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_CLKOUT1, NONE, DEEP, NF1, HIZCRx1, DISPUPD), */
    _PAD_CFG_STRUCT(LPC_CLKOUT1,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_IOSSTATE(HIZCRx1) | PAD_IOSTERM(DISPUPD)),

/* LPC_AD0 - LPC_AD0 */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD0, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), */
    _PAD_CFG_STRUCT(LPC_AD0,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1) | PAD_IOSTERM(DISPUPD)),

/* LPC_AD1 - LPC_AD1 */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD1, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), */
    _PAD_CFG_STRUCT(LPC_AD1,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1) | PAD_IOSTERM(DISPUPD)),

/* LPC_AD2 - LPC_AD2 */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD2, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), */
    _PAD_CFG_STRUCT(LPC_AD2,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1) | PAD_IOSTERM(DISPUPD)),

/* LPC_AD3 - LPC_AD3 */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD3, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), */
    _PAD_CFG_STRUCT(LPC_AD3,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1) | PAD_IOSTERM(DISPUPD)),

/* LPC_CLKRUNB - LPC_CLKRUNB */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_CLKRUNB, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), */
    _PAD_CFG_STRUCT(LPC_CLKRUNB,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1) | PAD_IOSTERM(DISPUPD)),

/* LPC_FRAMEB - LPC_FRAMEB */
    /* PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_FRAMEB, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), */
    _PAD_CFG_STRUCT(LPC_FRAMEB,
-		PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
+		PAD_FUNC(NF1) | PAD_RESET(DEEP),
    	PAD_PULL(UP_20K) | PAD_IOSSTATE(HIZCRx1) | PAD_IOSTERM(DISPUPD)),
 };