[S] Change in coreboot[main]: soc/mediatek/mt8196: Set mcupm reserved sram to non-cacheable

[Yu-Ping Wu (Code Review)]

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yidi Lin.

Yu-Ping Wu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86159?usp=email )

Change subject: soc/mediatek/mt8196: Set mcupm reserved sram to non-cacheable
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Patch Set 1:

(3 comments)

File src/soc/mediatek/common/mmu_operations.c:

https://review.coreboot.org/c/coreboot/+/86159/comment/56472c9f_7250f3a1?usp... :
PS1, Line 48: 	mtk_soc_mcufw_reserved();
This region is NOT within DRAM. Can we set this up in `mtk_mmu_init`? BTW I think it's correct to do this for all MTK platforms, so that we don't need a weak implementation.

File src/soc/mediatek/mt8196/mmu_cmops.c:

https://review.coreboot.org/c/coreboot/+/86159/comment/232b8441_9188459b?usp... :
PS1, Line 6: cachable
cacheable

https://review.coreboot.org/c/coreboot/+/86159/comment/81d7e798_a514c15f?usp... :
PS1, Line 10: NONSECURE
I'm not sure, but should this be `SECURE`?