Change in coreboot[master]: arch/x86/null_breakpoint: Remove handler before jumping to payload

[Arthur Heymans (Code Review)]

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64345 )

Change subject: arch/x86/null_breakpoint: Remove handler before jumping to payload
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Patch Set 4:

(1 comment)

Patchset:

PS4:
> This patch does not fix all the broken mainboards.
> We are also observing the issue during FSP-M stage.
> Bisect says the issue comes with patch 63657.
> On master branch I get currently the following debug output...
>
> [NOTE ]  coreboot-4.16-1034-gc2b4f44100 Tue May 17 06:04:44 UTC 2022 romstage starting (log level: 8)...
> [INFO ]  POST: 0x00
> [DEBUG]  pm1_sts: 0000 pm1_en: 0000 pm1_cnt: 00000000
> [DEBUG]  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
> [DEBUG]  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
> [DEBUG]  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
> [DEBUG]  gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
> [DEBUG]  TCO_STS:   0000 0000
> [DEBUG]  GEN_PMCON: a0014000 00000204
> [DEBUG]  GBLRST_CAUSE: 00000000 00000000
> [DEBUG]  prev_sleep_state 5
> [DEBUG]  FMAP: area COREBOOT found @ 410200 (12516864 bytes)
> [INFO ]  CBFS: Found 'fspm.bin' @0x34dc0 size 0x79000 in mcache @0xfef32034
> [INFO ]  Found TPM SLB9670 TT 2.0 by Infineon
> [DEBUG]  TPM: Extending digest for `CBFS: fspm.bin` into PCR 2
> [INFO ]  tlcl_extend: response is 0
> [DEBUG]  TPM: Digest of `CBFS: fspm.bin` to PCR 2 measured
> [INFO ]  POST: 0x34
> [DEBUG]  FMAP: area RW_MRC_CACHE found @ 400200 (65536 bytes)
> [NOTE ]  MRC: no data in 'RW_MRC_CACHE'
> [SPEW ]  bootmode is set to: 0
> [INFO ]  CBFS: Found 'hwinfo.hex' @0x15dc0 size 0x2650 in mcache @0xfef31f54
> [DEBUG]  TPM: Extending digest for `CBFS: hwinfo.hex` into PCR 3
> [INFO ]  tlcl_extend: response is 0
> [DEBUG]  TPM: Digest of `CBFS: hwinfo.hex` to PCR 3 measured
> [INFO ]  SPD: module type is LPDDR4X
> [INFO ]  SPD: banks 8, ranks 1, rows 15, columns 10, density 4096 Mb
> [INFO ]  SPD: device width 16 bits, bus width 32 bits
> [INFO ]  SPD: module size is 1024 MB (per channel)
> [INFO ]  POST: 0x36
> [INFO ]  POST: 0x92
> [ERROR]  Null dereference at eip: 0xff465799
> [ERROR]  Null dereference at eip: 0xff465799
> [ERROR]  Null dereference at eip: 0xff465799
> [ERROR]  Null dereference at eip: 0xff465799

CB:64426 fixes this for FSP, but only the COFFEELAKE one.