New patch to review for coreboot: 1abf758 drivers/marvell: Provide mvy88e8053 GbE stub driver

[Edward O'Callaghan]

Edward O'Callaghan ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5777

-gerrit

commit 1abf758e308e7d0c95114784cf71dd97877b148e
Author: Edward O'Callaghan 
Date:   Sun May 18 09:42:46 2014 +1000

drivers/marvell: Provide mvy88e8053 GbE stub driver

This stub driver initializes the Marvell Yukon 88E8053 Gigabit Ethernet
    adapter to keep coreboot from trying to execute an option ROM. Following
    the reasoning of RTL8168_ROM_DISABLE.

Change-Id: Idc44619767c631c5fcf550a5948c8947bde5e218
    Signed-off-by: Edward O'Callaghan 
---
 src/drivers/marvell/Kconfig            |  6 +++++
 src/drivers/marvell/Makefile.inc       | 20 ++++++++++++++
 src/drivers/marvell/mvy88e8053.c       | 48 +++++++++++++++++++++++++++++++++
 src/mainboard/ibase/mb899/Kconfig      |  1 +
 src/mainboard/ibase/mb899/Makefile.inc | 20 --------------
 src/mainboard/ibase/mb899/mv88e8053.c  | 49 ----------------------------------
 6 files changed, 75 insertions(+), 69 deletions(-)

diff --git a/src/drivers/marvell/Kconfig b/src/drivers/marvell/Kconfig
new file mode 100644
index 0000000..1870179
--- /dev/null
+++ b/src/drivers/marvell/Kconfig
@@ -0,0 +1,6 @@
+config MVY88E8053_ROM_DISABLE
+	bool "Disable MVY88E8053 ROM"
+	default n
+	help
+	  Just enough of a driver to make coreboot not look for an Option ROM.
+	  No configuration is necessary for the OS to pick up the device.
diff --git a/src/drivers/marvell/Makefile.inc b/src/drivers/marvell/Makefile.inc
new file mode 100644
index 0000000..be19414
--- /dev/null
+++ b/src/drivers/marvell/Makefile.inc
@@ -0,0 +1,20 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2012 secunet Security Networks AG
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+ramstage-$(CONFIG_MVY88E8053_ROM_DISABLE) += mvy88e8053.c
diff --git a/src/drivers/marvell/mvy88e8053.c b/src/drivers/marvell/mvy88e8053.c
new file mode 100644
index 0000000..5f5c029
--- /dev/null
+++ b/src/drivers/marvell/mvy88e8053.c
@@ -0,0 +1,48 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2008 coresystems GmbH
+ * Copyright (C) 2014 Edward O'Callaghan 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+/* This code should work for all ICH* southbridges with a NIC. */
+
+#include <console/console.h>
+#include <device/device.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+
+static void nic_init(struct device *dev)
+{
+	printk(BIOS_DEBUG, "Initializing Marvell Yukon 88E8053 Gigabit Ethernet\n");
+	// Nothing to do yet, but this has to be here to keep
+	// coreboot from trying to execute an option ROM.
+}
+
+static struct device_operations nic_ops = {
+	.read_resources		= pci_dev_read_resources,
+	.set_resources		= pci_dev_set_resources,
+	.enable_resources	= pci_dev_enable_resources,
+	.init			= nic_init,
+	.scan_bus		= 0,
+};
+
+static const struct pci_driver mvy88e8053_nic __pci_driver = {
+	.ops	= &nic_ops,
+	.vendor	= 0x11ab, /* Marvell Yukon */
+	.device	= 0x4362,
+};
diff --git a/src/mainboard/ibase/mb899/Kconfig b/src/mainboard/ibase/mb899/Kconfig
index 8975be2..6b44e4b 100644
--- a/src/mainboard/ibase/mb899/Kconfig
+++ b/src/mainboard/ibase/mb899/Kconfig
@@ -8,6 +8,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
    select CHECK_SLFRCS_ON_RESUME
    select SOUTHBRIDGE_INTEL_I82801GX
    select SUPERIO_WINBOND_W83627EHG
+	select MVY88E8053_ROM_DISABLE
    select EARLY_CBMEM_INIT
    select HAVE_ACPI_TABLES
    select HAVE_PIRQ_TABLE
diff --git a/src/mainboard/ibase/mb899/Makefile.inc b/src/mainboard/ibase/mb899/Makefile.inc
deleted file mode 100644
index 4fb55f5..0000000
--- a/src/mainboard/ibase/mb899/Makefile.inc
+++ /dev/null
@@ -1,20 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2007-2008 coresystems GmbH
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
-##
-
-ramstage-y += mv88e8053.c
diff --git a/src/mainboard/ibase/mb899/mv88e8053.c b/src/mainboard/ibase/mb899/mv88e8053.c
deleted file mode 100644
index 7db7fd8..0000000
--- a/src/mainboard/ibase/mb899/mv88e8053.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-/* This code should work for all ICH* southbridges with a NIC. */
-
-#include <console/console.h>
-#include <device/device.h>
-#include <device/pci.h>
-#include <device/pci_ids.h>
-
-static void nic_init(struct device *dev)
-{
-	printk(BIOS_DEBUG, "Initializing 88E8053 Gigabit Ethernet\n");
-	// Nothing to do yet, but this has to be here to keep
-	// coreboot from trying to execute an option ROM.
-}
-
-static struct device_operations nic_ops = {
-	.read_resources		= pci_dev_read_resources,
-	.set_resources		= pci_dev_set_resources,
-	.enable_resources	= pci_dev_enable_resources,
-	.init			= nic_init,
-	.scan_bus		= 0,
-};
-
-static const struct pci_driver rtl8169_nic __pci_driver = {
-	.ops	= &nic_ops,
-	.vendor	= 0x11ab,
-	.device	= 0x4362,
-};
-
-