Change in coreboot[master]: fsp/fsp2_0/cooperlake_sp: Set correct PSTACK number for IOU3

[Johnny Lin (Code Review)]

Johnny Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45022 )

Change subject: fsp/fsp2_0/cooperlake_sp: Set correct PSTACK number for IOU3
......................................................................

fsp/fsp2_0/cooperlake_sp: Set correct PSTACK number for IOU3

CPX FSP PSTACK2 (IOU3) is stack number 4.

Change-Id: I1c9e49bbc9a00de82d1fc67b3b4ed47e03eacdda
Signed-off-by: Johnny Lin 
---
M src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_iiouds.h
1 file changed, 10 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/45022/1

diff --git a/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_iiouds.h b/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_iiouds.h
index 79c4162..0f5b33f 100644
--- a/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_iiouds.h
+++ b/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_iiouds.h
@@ -111,13 +111,20 @@
 } PCIE_PORTS;

/**
- IIO Stacks
- **/
+ * IIO Stacks
+ *
+ * Ports    Stack	Stack(HOB)	IioConfigIou
+ * =================================================
+ * 0        CSTACK	stack 0		IOU0
+ * 1A..1D   PSTACK0	stack 1		IOU1
+ * 2A..2D   PSTACK1	stack 2		IOU2
+ * 3A..3D   PSTACK2	stack 4		IOU3
+ */
 typedef enum {
    CSTACK = 0,
    PSTACK0,
    PSTACK1,
-	PSTACK2,
+	PSTACK2 = 4,
    MAX_STACKS
 } IIO_STACKS;

[Jonathan Zhang (Code Review)]

Jonathan Zhang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45022 )

Change subject: fsp/fsp2_0/cooperlake_sp: Set correct PSTACK number for IOU3
......................................................................

Patch Set 1: Code-Review+1

In the commit message, please add what is the problem caused and how you verified.

Change in coreboot[master]: fsp/fsp2_0/cooperlake_sp: Set correct stack number for IOU3

[Johnny Lin (Code Review)]

Hello build bot (Jenkins), Jonathan Zhang, Jingle Hsu, Morgan Jang, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/45022

to look at the new patch set (#2).

Change subject: fsp/fsp2_0/cooperlake_sp: Set correct stack number for IOU3
......................................................................

fsp/fsp2_0/cooperlake_sp: Set correct stack number for IOU3

PSTACK2 (IOU3) should be stack number 4, mainboard uses stack number as
the index to access the bus number array read by get_stack_busnos().
Without the fix it would get the wrong bus number (0xb1).

Tested=On OCP Delta Lake, dmidecode -t 9 to verify slots bus number on
IOU3 are correct (0xb2).

Change-Id: I1c9e49bbc9a00de82d1fc67b3b4ed47e03eacdda
Signed-off-by: Johnny Lin 
---
M src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_iiouds.h
1 file changed, 10 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/45022/2

Change in coreboot[master]: vendocode/intel/fsp/fsp2_0/cpx_sp: Set correct stack number for IOU3

[Johnny Lin (Code Review)]

Hello build bot (Jenkins), Jonathan Zhang, Jingle Hsu, Angel Pons, Morgan Jang, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/45022

to look at the new patch set (#3).

Change subject: vendocode/intel/fsp/fsp2_0/cpx_sp: Set correct stack number for IOU3
......................................................................

vendocode/intel/fsp/fsp2_0/cpx_sp: Set correct stack number for IOU3

PSTACK2 (IOU3) should be stack number 4, mainboard uses stack number as
the index to access the bus number array read by get_stack_busnos().
Without the fix it would get the wrong bus number (0xb1).

Tested=On OCP Delta Lake, dmidecode -t 9 to verify slots bus number on
IOU3 are correct (0xb2).

Change-Id: I1c9e49bbc9a00de82d1fc67b3b4ed47e03eacdda
Signed-off-by: Johnny Lin 
---
M src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_iiouds.h
1 file changed, 10 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/45022/3

Change in coreboot[master]: vendorcode/intel/fsp/fsp2_0/cpx_sp: Set correct stack number for IOU3

[Johnny Lin (Code Review)]

Hello build bot (Jenkins), Jonathan Zhang, Jingle Hsu, Angel Pons, Morgan Jang, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/45022

to look at the new patch set (#4).

Change subject: vendorcode/intel/fsp/fsp2_0/cpx_sp: Set correct stack number for IOU3
......................................................................

vendorcode/intel/fsp/fsp2_0/cpx_sp: Set correct stack number for IOU3

PSTACK2 (IOU3) should be stack number 4, mainboard uses stack number as
the index to access the bus number array read by get_stack_busnos().
Without the fix it would get the wrong bus number (0xb1).

Tested=On OCP Delta Lake, dmidecode -t 9 to verify slots bus number on
IOU3 are correct (0xb2).

Change-Id: I1c9e49bbc9a00de82d1fc67b3b4ed47e03eacdda
Signed-off-by: Johnny Lin 
---
M src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_iiouds.h
1 file changed, 10 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/45022/4

Change in coreboot[master]: vendorcode/intel/fsp/fsp2_0/cpx_sp: Set correct stack number for IOU3

[Jonathan Zhang (Code Review)]

Jonathan Zhang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45022 )

Change subject: vendorcode/intel/fsp/fsp2_0/cpx_sp: Set correct stack number for IOU3
......................................................................

Patch Set 4: Code-Review+2

Change in coreboot[master]: vendorcode/intel/fsp/fsp2_0/cpx_sp: Set correct stack number for IOU3

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45022 )

Change subject: vendorcode/intel/fsp/fsp2_0/cpx_sp: Set correct stack number for IOU3
......................................................................

Patch Set 4: Code-Review+2

Change in coreboot[master]: vendorcode/intel/fsp/fsp2_0/cpx_sp: Set correct stack number for IOU3

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45022 )

Change subject: vendorcode/intel/fsp/fsp2_0/cpx_sp: Set correct stack number for IOU3
......................................................................

vendorcode/intel/fsp/fsp2_0/cpx_sp: Set correct stack number for IOU3

PSTACK2 (IOU3) should be stack number 4, mainboard uses stack number as
the index to access the bus number array read by get_stack_busnos().
Without the fix it would get the wrong bus number (0xb1).

Tested=On OCP Delta Lake, dmidecode -t 9 to verify slots bus number on
IOU3 are correct (0xb2).

Change-Id: I1c9e49bbc9a00de82d1fc67b3b4ed47e03eacdda
Signed-off-by: Johnny Lin 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45022
Tested-by: build bot (Jenkins) 
Reviewed-by: Jonathan Zhang 
Reviewed-by: Angel Pons 
---
M src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_iiouds.h
1 file changed, 10 insertions(+), 3 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Angel Pons: Looks good to me, approved
  Jonathan Zhang: Looks good to me, approved

diff --git a/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_iiouds.h b/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_iiouds.h
index 79c4162..0f5b33f 100644
--- a/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_iiouds.h
+++ b/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_iiouds.h
@@ -111,13 +111,20 @@
 } PCIE_PORTS;

/**
- IIO Stacks
- **/
+ * IIO Stacks
+ *
+ * Ports    Stack	Stack(HOB)	IioConfigIou
+ * =================================================
+ * 0        CSTACK	stack 0		IOU0
+ * 1A..1D   PSTACK0	stack 1		IOU1
+ * 2A..2D   PSTACK1	stack 2		IOU2
+ * 3A..3D   PSTACK2	stack 4		IOU3
+ */
 typedef enum {
    CSTACK = 0,
    PSTACK0,
    PSTACK1,
-	PSTACK2,
+	PSTACK2 = 4,
    MAX_STACKS
 } IIO_STACKS;