[L] Change in coreboot[main]: mb/cwwk: Add CWWK CW-ADL-4L-V1.0 board

[Angel Pons (Code Review)]

Attention is currently required from: Brandon Weeks, Federico Amedeo Izzo, Felix Singer, Joel Linn, Paul Menzel.

Angel Pons has posted comments on this change by Brandon Weeks. ( https://review.coreboot.org/c/coreboot/+/81595?usp=email )

Change subject: mb/cwwk: Add CWWK CW-ADL-4L-V1.0 board
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Patch Set 10: Code-Review+1

(2 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/81595/comment/a1d6f5e9_681dac85?usp... :
PS9, Line 10: Memory: DDR5-4800 SODIMM (max 16 GB)
> It only has 1 DIMM slot, however I get an error during complication when DIMM_MAX is set to 1: https […]

OK, I wouldn't worry about the Kconfig. But at least SPD mapping should be updated.

File src/mainboard/cwwk/adl/romstage_fsp_params.c:

https://review.coreboot.org/c/coreboot/+/81595/comment/7d09a524_d0c3544b?usp... :
PS10, Line 23: 			[1] = { .addr_dimm[0] = 0x52, },
If the board only has one DIMM slot, then only one of these lines is needed. As to which, To figure out which, I'd suggest `i2cdetect -y $SMBUS_INDEX` where `SMBUS_INDEX` is the number that appears in `i2cdetect -l`