Change in coreboot[master]: soc/amd/picasso: clean up and re-sort UPD table

[Martin Roth (Code Review)]

Attention is currently required from: Frank Wu, Jason Glenesk, Raul Rangel, Marshall Dawson, Chris Wang, chris wang, EricR Lai.
Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50212 )

Change subject: soc/amd/picasso: clean up and re-sort UPD table
......................................................................

Patch Set 6: Code-Review+2

(2 comments)

Patchset:

PS6: 
Verified that this matches the update that will be going into the AGESA FSP code.

File src/soc/amd/picasso/chip.h:

https://review.coreboot.org/c/coreboot/+/50212/comment/ad5dc03a_09d10ff5 
PS6, Line 257: /* bit vector of phy, bit0=1: DP0, bit1=1: DP1, bit2=1: DP2 bit3=1: DP3 */
             : 	uint8_t edp_physel;
Not needed for this commit, but why not turn this into a macro?

#define DP0_PHY BIT(0)
...