Change in coreboot[master]: drivers/wifi: Move MTL Typhoon Peak 2 DIDs from SoC to generic driver

[Subrata Banik (Code Review)]

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/64592 )

Change subject: drivers/wifi: Move MTL Typhoon Peak 2 DIDs from SoC to generic driver
......................................................................

drivers/wifi: Move MTL Typhoon Peak 2 DIDs from SoC to generic driver

This patch removes the MTL CNVi DIDs macros from IA common code and is
added into the generic wifi driver.

Previously Garfield Peak DIDs for Alder Lake SoC also added similarly
to generic wifi drivers.

BUG=b:224325352
TEST=Able to build and boot MTL simics.

Signed-off-by: Subrata Banik 
Change-Id: Ib98762749c71f63df3e8d03be910539469359c68
---
M src/drivers/wifi/generic/generic.c
M src/include/device/pci_ids.h
M src/soc/intel/common/block/cnvi/cnvi.c
3 files changed, 9 insertions(+), 8 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/64592/1

diff --git a/src/drivers/wifi/generic/generic.c b/src/drivers/wifi/generic/generic.c
index a66656e..e8e066bc 100644
--- a/src/drivers/wifi/generic/generic.c
+++ b/src/drivers/wifi/generic/generic.c
@@ -119,6 +119,11 @@
    PCI_DID_GrP_6SERIES_1_WIFI,
    PCI_DID_GrP_6SERIES_2_WIFI,
    PCI_DID_GrP_6SERIES_3_WIFI,
+	/* Typhoon Peak 2 */
+	PCI_DID_TyP2_6SERIES_1_WIFI,
+	PCI_DID_TyP2_6SERIES_2_WIFI,
+	PCI_DID_TyP2_6SERIES_3_WIFI,
+	PCI_DID_TyP2_6SERIES_4_WIFI,
    0
 };

diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index ddc055f..b34158f 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -4420,6 +4420,10 @@
 #define PCI_DID_GrP_6SERIES_1_WIFI		0x51f0
 #define PCI_DID_GrP_6SERIES_2_WIFI		0x7af0
 #define PCI_DID_GrP_6SERIES_3_WIFI		0x51f1
+#define PCI_DID_TyP2_6SERIES_1_WIFI		0x7e40
+#define PCI_DID_TyP2_6SERIES_2_WIFI		0x7e41
+#define PCI_DID_TyP2_6SERIES_3_WIFI		0x7e42
+#define PCI_DID_TyP2_6SERIES_4_WIFI		0x7e43

#define PCI_DID_INTEL_TGL_IPU			0x9a19
 #define PCI_DID_INTEL_TGL_H_IPU			0x9a39
@@ -4467,10 +4471,6 @@
 #define PCI_DID_INTEL_ADL_N_CNVI_WIFI_1		0x54f1
 #define PCI_DID_INTEL_ADL_N_CNVI_WIFI_2		0x54f2
 #define PCI_DID_INTEL_ADL_N_CNVI_WIFI_3		0x54f3
-#define PCI_DID_INTEL_MTL_CNVI_WIFI_0		0x7e40
-#define PCI_DID_INTEL_MTL_CNVI_WIFI_1		0x7e41
-#define PCI_DID_INTEL_MTL_CNVI_WIFI_2		0x7e42
-#define PCI_DID_INTEL_MTL_CNVI_WIFI_3		0x7e43

/* Intel Crashlog */
 #define PCI_DID_INTEL_TGL_CPU_CRASHLOG_SRAM		0x9a0d
diff --git a/src/soc/intel/common/block/cnvi/cnvi.c b/src/soc/intel/common/block/cnvi/cnvi.c
index f4fa019..fd0c33d 100644
--- a/src/soc/intel/common/block/cnvi/cnvi.c
+++ b/src/soc/intel/common/block/cnvi/cnvi.c
@@ -21,10 +21,6 @@
 };

static const unsigned short wifi_pci_device_ids[] = {
-	PCI_DID_INTEL_MTL_CNVI_WIFI_0,
-	PCI_DID_INTEL_MTL_CNVI_WIFI_1,
-	PCI_DID_INTEL_MTL_CNVI_WIFI_2,
-	PCI_DID_INTEL_MTL_CNVI_WIFI_3,
    PCI_DID_INTEL_CML_LP_CNVI_WIFI,
    PCI_DID_INTEL_CML_H_CNVI_WIFI,
    PCI_DID_INTEL_CNL_LP_CNVI_WIFI,