Change in coreboot[master]: soc/intel/skylake: Use PCR write to disable HECI1

[Subrata Banik (Code Review)]

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/61433 )

Change subject: soc/intel/skylake: Use PCR write to disable HECI1
......................................................................

soc/intel/skylake: Use PCR write to disable HECI1

Set the SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR config for
Skylake to disable HECI1 device using PCR writes.

BUG=none
TEST=None

Signed-off-by: Subrata Banik 
Change-Id: Ib6bfa7c48660a6df8d0944de675a4f30fe248d1b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61433
Tested-by: build bot (Jenkins) 
Reviewed-by: Lean Sheng Tan 
---
M src/soc/intel/skylake/Kconfig
M src/soc/intel/skylake/finalize.c
2 files changed, 4 insertions(+), 2 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Lean Sheng Tan: Looks good to me, approved

diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index b90fdef..31e733c 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -63,6 +63,7 @@
    select SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL
    select SOC_INTEL_COMMON_BLOCK_GSPI
    select SOC_INTEL_COMMON_BLOCK_HDA
+	select SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR if DISABLE_HECI1_AT_PRE_BOOT
    select SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE
    select SOC_INTEL_COMMON_BLOCK_SA
    select SOC_INTEL_COMMON_BLOCK_SCS
diff --git a/src/soc/intel/skylake/finalize.c b/src/soc/intel/skylake/finalize.c
index 733f037..5021595 100644
--- a/src/soc/intel/skylake/finalize.c
+++ b/src/soc/intel/skylake/finalize.c
@@ -9,6 +9,7 @@
 #include <device/pci.h>
 #include <device/pci_ops.h>
 #include <intelblocks/cpulib.h>
+#include <intelblocks/cse.h>
 #include <intelblocks/lpc_lib.h>
 #include <intelblocks/p2sb.h>
 #include <intelblocks/pcr.h>
@@ -30,7 +31,7 @@
 #define PCR_PSFX_T0_SHDW_PCIEN	0x1C
 #define PCR_PSFX_T0_SHDW_PCIEN_FUNDIS	(1 << 8)

-static void pch_disable_heci(void)
+void soc_disable_heci1_using_pcr(void)
 {
    /* unhide p2sb device */
    p2sb_unhide();
@@ -60,7 +61,7 @@

/* we should disable Heci1 based on the config */
    if (CONFIG(DISABLE_HECI1_AT_PRE_BOOT))
-		pch_disable_heci();
+		heci1_disable();

/* Hide p2sb device as the OS must not change BAR0. */
    p2sb_hide();