David Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45169 )
Change subject: mb/google/puff: Update DPTF parameters for faffy ......................................................................
mb/google/puff: Update DPTF parameters for faffy
Update critical and passive policy for TSR0.
BUG=b:167477885 BRANCH=puff TEST=build and verify by thermal team
Signed-off-by: David Wu david_wu@quanta.corp-partner.google.com Change-Id: I244e1b5cacabf5b73c47b4039ae150cd17fcd0fc --- M src/mainboard/google/hatch/variants/faffy/overridetree.cb 1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/45169/1
diff --git a/src/mainboard/google/hatch/variants/faffy/overridetree.cb b/src/mainboard/google/hatch/variants/faffy/overridetree.cb index c1bd1e4..a05cb9d 100644 --- a/src/mainboard/google/hatch/variants/faffy/overridetree.cb +++ b/src/mainboard/google/hatch/variants/faffy/overridetree.cb @@ -281,11 +281,11 @@ chip drivers/intel/dptf ## Passive Policy register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 95, 5000)" - register "policies.passive[1]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 63, 5000)" + register "policies.passive[1]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 75, 5000)"
## Critical Policy register "policies.critical[0]" = "DPTF_CRITICAL(CPU, 100, SHUTDOWN)" - register "policies.critical[1]" = "DPTF_CRITICAL(TEMP_SENSOR_0, 78, SHUTDOWN)" + register "policies.critical[1]" = "DPTF_CRITICAL(TEMP_SENSOR_0, 85, SHUTDOWN)"
## Power Limits Control # 10-15W PL1 in 200mW increments, avg over 28-32s interval
Sam McNally has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45169 )
Change subject: mb/google/puff: Update DPTF parameters for faffy ......................................................................
Patch Set 1: Code-Review+2
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45169 )
Change subject: mb/google/puff: Update DPTF parameters for faffy ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45169/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45169/1//COMMIT_MSG@7 PS1, Line 7: mb/google/puff: Update DPTF parameters for faffy Increase DPTF parameters for faffy
Hello Sam McNally, build bot (Jenkins), Edward O'Callaghan,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45169
to look at the new patch set (#2).
Change subject: mb/google/puff: Increase DPTF parameters for faffy ......................................................................
mb/google/puff: Increase DPTF parameters for faffy
Update critical and passive policy for TSR0.
BUG=b:167477885 BRANCH=puff TEST=build and verify by thermal team
Signed-off-by: David Wu david_wu@quanta.corp-partner.google.com Change-Id: I244e1b5cacabf5b73c47b4039ae150cd17fcd0fc --- M src/mainboard/google/hatch/variants/faffy/overridetree.cb 1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/45169/2
David Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45169 )
Change subject: mb/google/puff: Increase DPTF parameters for faffy ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45169/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45169/1//COMMIT_MSG@7 PS1, Line 7: mb/google/puff: Update DPTF parameters for faffy
Increase DPTF parameters for faffy
Done
Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45169 )
Change subject: mb/google/puff: Increase DPTF parameters for faffy ......................................................................
Patch Set 2: Code-Review+2
Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45169 )
Change subject: mb/google/puff: Increase DPTF parameters for faffy ......................................................................
mb/google/puff: Increase DPTF parameters for faffy
Update critical and passive policy for TSR0.
BUG=b:167477885 BRANCH=puff TEST=build and verify by thermal team
Signed-off-by: David Wu david_wu@quanta.corp-partner.google.com Change-Id: I244e1b5cacabf5b73c47b4039ae150cd17fcd0fc Reviewed-on: https://review.coreboot.org/c/coreboot/+/45169 Reviewed-by: Edward O'Callaghan quasisec@chromium.org Reviewed-by: Sam McNally sammc@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/hatch/variants/faffy/overridetree.cb 1 file changed, 2 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Edward O'Callaghan: Looks good to me, approved Sam McNally: Looks good to me, approved
diff --git a/src/mainboard/google/hatch/variants/faffy/overridetree.cb b/src/mainboard/google/hatch/variants/faffy/overridetree.cb index c1bd1e4..a05cb9d 100644 --- a/src/mainboard/google/hatch/variants/faffy/overridetree.cb +++ b/src/mainboard/google/hatch/variants/faffy/overridetree.cb @@ -281,11 +281,11 @@ chip drivers/intel/dptf ## Passive Policy register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 95, 5000)" - register "policies.passive[1]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 63, 5000)" + register "policies.passive[1]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 75, 5000)"
## Critical Policy register "policies.critical[0]" = "DPTF_CRITICAL(CPU, 100, SHUTDOWN)" - register "policies.critical[1]" = "DPTF_CRITICAL(TEMP_SENSOR_0, 78, SHUTDOWN)" + register "policies.critical[1]" = "DPTF_CRITICAL(TEMP_SENSOR_0, 85, SHUTDOWN)"
## Power Limits Control # 10-15W PL1 in 200mW increments, avg over 28-32s interval
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45169 )
Change subject: mb/google/puff: Increase DPTF parameters for faffy ......................................................................
Patch Set 3:
Automatic boot test returned (PASS/FAIL/TOTAL): 7/1/8 "QEMU x86 q35/ich9" (x86_32) using payload TianoCore : SUCCESS : https://lava.9esec.io/r/18353 "QEMU x86 q35/ich9" (x86_32) using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/18352 "QEMU x86 i440fx/piix4" (x86_64) using payload SeaBIOS : FAIL : https://lava.9esec.io/r/18351 "QEMU x86 i440fx/piix4" (x86_32) using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/18350 "QEMU AArch64" using payload LinuxBoot_u-root_kexec : SUCCESS : https://lava.9esec.io/r/18349 "HP Z220 SFF Workstation" (x86_32) using payload LinuxBoot_BusyBox_kexec : SUCCESS : https://lava.9esec.io/r/18356 "HP Compaq 8200 Elite SFF PC" (x86_32) using payload TianoCore : SUCCESS : https://lava.9esec.io/r/18355 "HP Compaq 8200 Elite SFF PC" (x86_32) using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/18354
Please note: This test is under development and might not be accurate at all!