Change in coreboot[master]: cpu/intel/common: rework AES-NI locking

[Nico Huber (Code Review)]

Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46275 )

Change subject: cpu/intel/common: rework AES-NI locking
......................................................................

cpu/intel/common: rework AES-NI locking

Simplify the AES-NI code by using msr_set and correct the comment.

Change-Id: Ib2cda433bbec0192277839c02a1862b8f41340cb
Signed-off-by: Michael Niewöhner 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46275
Tested-by: build bot (Jenkins) 
Reviewed-by: Tim Wawrzynczak 
Reviewed-by: Nico Huber 
---
M src/cpu/intel/common/common.h
M src/cpu/intel/common/common_init.c
M src/include/cpu/intel/msr.h
3 files changed, 7 insertions(+), 11 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Nico Huber: Looks good to me, but someone else must approve
  Tim Wawrzynczak: Looks good to me, approved

diff --git a/src/cpu/intel/common/common.h b/src/cpu/intel/common/common.h
index aaeca1d..57a51e5 100644
--- a/src/cpu/intel/common/common.h
+++ b/src/cpu/intel/common/common.h
@@ -28,8 +28,8 @@
 bool intel_ht_sibling(void);

/*
- * Lock AES-NI feature (MSR_FEATURE_CONFIG) to prevent unintended disabling
- * as suggested in Intel document 325384-070US.
+ * Lock AES-NI feature (MSR_FEATURE_CONFIG) to prevent unintended changes
+ * to the enablement state as suggested in Intel document 325384-070US.
  */
 void set_aesni_lock(void);

diff --git a/src/cpu/intel/common/common_init.c b/src/cpu/intel/common/common_init.c
index e532c97..f189c59 100644
--- a/src/cpu/intel/common/common_init.c
+++ b/src/cpu/intel/common/common_init.c
@@ -266,10 +266,6 @@
    }
 }

-/*
- * Lock AES-NI feature (MSR_FEATURE_CONFIG) to prevent unintended disabling
- * as suggested in Intel document 325384-070US.
- */
 void set_aesni_lock(void)
 {
    msr_t msr;
@@ -279,8 +275,8 @@
    	return;

msr = rdmsr(MSR_FEATURE_CONFIG);
-	if ((msr.lo & 1) == 0) {
-		msr.lo |= 1;
-		wrmsr(MSR_FEATURE_CONFIG, msr);
-	}
+	if (msr.lo & AESNI_LOCK)
+		return;
+
+	msr_set(MSR_FEATURE_CONFIG, AESNI_LOCK);
 }
diff --git a/src/include/cpu/intel/msr.h b/src/include/cpu/intel/msr.h
index 73dd320..0d11b5e 100644
--- a/src/include/cpu/intel/msr.h
+++ b/src/include/cpu/intel/msr.h
@@ -6,6 +6,6 @@
  */

#define MSR_FEATURE_CONFIG	0x13c
-#define  AESNI_LOCK_BIT		0
+#define  AESNI_LOCK		(1 << 0)

#endif /* CPU_INTEL_MSR_H */