Attention is currently required from: Jason Glenesk, Raul Rangel, Felix Held. Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50451 )
Change subject: soc/amd/cezanne: Add PCI IRQ Router definitions ......................................................................
Patch Set 2:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/50451/comment/827f8b3a_31eec49c PS2, Line 10: I renamed Misc1 and Misc2 to HPET_L and HPET_H. I'm struggling to find anything in the PPR to support this. Have tried searching for "hpet_l" and "hpet_conf_cap" but I'm coming up empty.
File src/soc/amd/cezanne/include/soc/amd_pci_int_defs.h:
https://review.coreboot.org/c/coreboot/+/50451/comment/20691bcf_119fd1cb PS1, Line 61: #define PIRQ_UART2 0x78 /* UART2 */ : #define PIRQ_UART3 0x79 /* UART3 */
oh, turns out that i didn't hit submit on that change request; at least i don't find a confirmation […]
By don't exist, do you perhaps mean that they're not pinned out for FP6 and are made unavailable? (e.g. could they be present in other F19h Mod 51h products?) Or do you think the documentation just contains definitions that don't apply?
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Marshall Dawson (Code Review)