[XS] Change in coreboot[main]: arch/riscv: reset the pmp on startup

[ron minnich (Code Review)]

ron minnich has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81282?usp=email )

Change subject: arch/riscv: reset the pmp on startup
......................................................................

arch/riscv: reset the pmp on startup

All RISC-V used today support the PMP.

There is no requirement that the PMP registers be cleared on power-on/reset.
Always clear them as part of HART initialization.

Change-Id: Id356ea66100582d6750ffa9fc01f031a16835e4f
Signed-off-by: Ronald G Minnich 
---
M src/arch/riscv/virtual_memory.c
1 file changed, 4 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/81282/1

diff --git a/src/arch/riscv/virtual_memory.c b/src/arch/riscv/virtual_memory.c
index 43e3d70..79a0985 100644
--- a/src/arch/riscv/virtual_memory.c
+++ b/src/arch/riscv/virtual_memory.c
@@ -5,6 +5,7 @@

#include <arch/cpu.h>
 #include <arch/encoding.h>
+#include <arch/pmp.h>
 #include <vm.h>

/* Delegate controls which traps are delegated to the payload. If you
@@ -44,4 +45,7 @@

// Enable all user/supervisor-mode counters
    write_csr(mcounteren, 7);
+
+	// Every CPU we care about has pmp.
+	reset_pmp();
 }