[M] Change in coreboot[main]: soc/intel: Adapt crashlog IP to also support 64-bit

[Sowmya Aralguppe (Code Review)]

Attention is currently required from: Angel Pons, Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Jamie Ryu, Kapil Porwal, Nick Vaccaro, Paul Menzel, Pratikkumar V Prajapati, Subrata Banik, Tarun.

Sowmya Aralguppe has posted comments on this change by Sowmya Aralguppe. ( https://review.coreboot.org/c/coreboot/+/83106?usp=email )

Change subject: soc/intel: Adapt crashlog IP to also support 64-bit
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Patch Set 22:

(1 comment)

File src/soc/intel/meteorlake/crashlog.c:

https://review.coreboot.org/c/coreboot/+/83106/comment/c15c3e2b_7b475745?usp... :
PS22, Line 352: + 4
> Why do we need to add 4 here? […]

Dont we need to check for 0xdeadbeef
> > My understanding is this - pls correct if wrong

Various dielets store crash record in its own SRAM and the offset and size is stored in the header .
During DISCOVERY- the size and the offset is read and while COLLECTING the crash record-  need to check for invalid crash record data .
For example if we take the example of PUNIT (the 1st in the count) 
First we read PUNIT_SRAM_DISCOVERY_0 and get the child count 
and then loop count number of times
Inside the loop read PUNIT_SRAM_DISCOVERY_1 (which is bar address + 0x1f78)
we will get the size and offset

Get PUINT crashlog record located at  (address = dev10 MMIO base + Offset in PUNIT_SRAM_DISCOVERY_1 )
Check if PUNIT crashlog record is valid (the first DWORD is not 0 nor 0xdeadbeef && consumed bit is not set), collect all crashlog data)
Since we are not reading the crash data and only populating the discovery table struct we donot need to check for 0xdeadbeef or 0 values

Why do we need to add 4 here
> > 31:0	default	32'h0	RO	OFFSET

Offset based on Access Type. This will have the DVSEC/MMIO address for the given crashlog sram.		
63:32	default	32'h800	RO/V	DATA_BUFFER_SIZE Size in DWORDS of the CRashlog 
SRAM

here we are reading the upper 32 bytes and to check if size is zero ( and it will not be zero as default values for storage SRAM is 0x800)
while collecting the crash record data from the sram address we need to check if the value is 0 or deadbeef