Martin Roth has uploaded this change for review. ( https://review.coreboot.org/22371
Change subject: mainboard/google/kahlee: Define MEM_CONFIG3 for Kahlee variant ......................................................................
mainboard/google/kahlee: Define MEM_CONFIG3 for Kahlee variant
Even though this GPIO isn't used for Kahlee, it needs to be defined so that the weak version of the variant_board_id() function can compile.
BUG=b:68293392 TEST=Build and boot kahlee
Change-Id: Ia8daf70fbafe02ec37c6b5eb8421cdb11de3be8b Signed-off-by: Martin Roth martinroth@google.com --- M src/mainboard/google/kahlee/variants/kahlee/include/variant/gpio.h 1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/22371/1
diff --git a/src/mainboard/google/kahlee/variants/kahlee/include/variant/gpio.h b/src/mainboard/google/kahlee/variants/kahlee/include/variant/gpio.h index dfb6354..78bca93 100644 --- a/src/mainboard/google/kahlee/variants/kahlee/include/variant/gpio.h +++ b/src/mainboard/google/kahlee/variants/kahlee/include/variant/gpio.h @@ -22,6 +22,7 @@ #define MEM_CONFIG0 GPIO_135 #define MEM_CONFIG1 GPIO_140 #define MEM_CONFIG2 GPIO_144 +#define MEM_CONFIG3 0
/* SPI Write protect */ #define CROS_WP_GPIO GPIO_142