Change in coreboot[master]: soc/intel/common: Prevent SMI storm when setting SPI WPD bit

[Patrick Rudolph (Code Review)]

Attention is currently required from: Nico Huber, Benjamin Doron, Tim Wawrzynczak, Angel Pons, Patrick Rudolph.
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50754 )

Change subject: soc/intel/common: Prevent SMI storm when setting SPI WPD bit
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Patch Set 3:

(2 comments)

File src/soc/intel/common/block/fast_spi/fast_spi.c:

https://review.coreboot.org/c/coreboot/+/50754/comment/124a73ec_4dc7efaf 
PS3, Line 393: SPI_BIOS_CONTROL
check if bit8 is set. If it's not this function will accidently enable SMI on write protect disable.

File src/soc/intel/common/block/smm/smihandler.c:

https://review.coreboot.org/c/coreboot/+/50754/comment/1e84ce88_59995396 
PS3, Line 388: fast_spi_clear_smi
do you need to clear SMI_STS.TCO_STS after this call?