Attention is currently required from: Paul Menzel, Mario Scheithauer.
Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58568 )
Change subject: mb/siemens/mc_ehl1: Clean up PCIe root port settings in devicetree
......................................................................
Patch Set 3:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/58568/comment/cea1e1bc_4f9d6fa7
PS2, Line 9: ports #5 (00:1c.4) and #6
For the numbering of the root ports #5 and #6 you use a hashtag in front of the number. […]
Done
--
To view, visit
https://review.coreboot.org/c/coreboot/+/58568
To unsubscribe, or for help writing mail filters, visit
https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I06f59f0369ffcd958b5fe12bb3c646d37103811f
Gerrit-Change-Number: 58568
Gerrit-PatchSet: 3
Gerrit-Owner: Werner Zeh
werner.zeh@siemens.com
Gerrit-Reviewer: Mario Scheithauer
mario.scheithauer@siemens.com
Gerrit-Reviewer: build bot (Jenkins)
no-reply@coreboot.org
Gerrit-CC: Paul Menzel
paulepanter@mailbox.org
Gerrit-Attention: Paul Menzel
paulepanter@mailbox.org
Gerrit-Attention: Mario Scheithauer
mario.scheithauer@siemens.com
Gerrit-Comment-Date: Tue, 02 Nov 2021 06:06:41 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Mario Scheithauer
mario.scheithauer@siemens.com
Gerrit-MessageType: comment