Leroy P Leahy (leroy.p.leahy@intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13436
-gerrit
commit cc719bcb25eeadf6c9b54c81defc9b7d614e2fcc Author: Lee Leahy lpleahyjr@gmail.com Date: Fri Jan 1 18:09:50 2016 -0800
FSP 1.1 - Remove extra include references
Remove include references to the soc include directory which are not required to build the FSP driver.
BRANCH=none BUG=None TEST=Build and run on Galileo
Change-Id: Ie519b3a8da8c36b47da512d3811796eab62ce208 Signed-off-by: Lee Leahy leroy.p.leahy@intel.com --- src/drivers/intel/fsp1_1/raminit.c | 3 +-- src/drivers/intel/fsp1_1/romstage.c | 4 +--- 2 files changed, 2 insertions(+), 5 deletions(-)
diff --git a/src/drivers/intel/fsp1_1/raminit.c b/src/drivers/intel/fsp1_1/raminit.c index 2ba77e3..41d9668 100644 --- a/src/drivers/intel/fsp1_1/raminit.c +++ b/src/drivers/intel/fsp1_1/raminit.c @@ -16,12 +16,11 @@ #include <cbmem.h> #include <console/console.h> #include <fsp/memmap.h> +#include <fsp/romstage.h> #include <fsp/util.h> #include <lib.h> /* hexdump */ #include <reset.h> #include <soc/intel/common/mma.h> -#include <soc/pei_data.h> -#include <soc/romstage.h> #include <string.h> #include <timestamp.h> #include <bootmode.h> diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c index 16db4df..6d51be9 100644 --- a/src/drivers/intel/fsp1_1/romstage.c +++ b/src/drivers/intel/fsp1_1/romstage.c @@ -28,6 +28,7 @@ #include <ec/google/chromeec/ec.h> #include <ec/google/chromeec/ec_commands.h> #include <elog.h> +#include <fsp/romstage.h> #include <fsp/util.h> #include <memory_info.h> #include <reset.h> @@ -35,10 +36,7 @@ #include <smbios.h> #include <soc/intel/common/mrc_cache.h> #include <soc/intel/common/util.h> -#include <soc/pei_wrapper.h> #include <soc/pm.h> -#include <soc/romstage.h> -#include <soc/spi.h> #include <stage_cache.h> #include <timestamp.h> #include <tpm.h>
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Leroy P Leahy