Sean Rhodes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/61589 )
Change subject: soc/apollolake: Add northbridge that avoids collisions ......................................................................
soc/apollolake: Add northbridge that avoids collisions
Signed-off-by: Sean Rhodes sean@starlabs.systems Change-Id: I3c69b7cfd4c160a5d5b827c45a99abe963b9f7dd --- A src/soc/intel/apollolake/acpi/northbridge-glk.asl A src/soc/intel/apollolake/acpi/pdrc.asl 2 files changed, 392 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/61589/1
diff --git a/src/soc/intel/apollolake/acpi/northbridge-glk.asl b/src/soc/intel/apollolake/acpi/northbridge-glk.asl new file mode 100644 index 0000000..d52ffe9 --- /dev/null +++ b/src/soc/intel/apollolake/acpi/northbridge-glk.asl @@ -0,0 +1,348 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +Name(_HID, EISAID("PNP0A08")) /* PCIe */ +Name(_CID, EISAID("PNP0A03")) /* PCI */ + +Device(MCHC) +{ + Name(_ADR, 0x00000000) + OperationRegion(HBUS, PCI_Config, 0x00, 0xFF) + Field(HBUS, DWordAcc, NoLock, Preserve) + { + Offset(0x48), + MHEN, 1, + , 14, + MHBR, 24, + Offset(0xB0), + BDSM, 32, + Offset(0xBC), + TOLD, 32, + } +} + +Name (MAB, 0x1000000000000) +Name (MAL, 0x1000000000000) +Name (MAM, 0x1000000000000) + +Method(_CRS,0,Serialized) { + Name (MCRS, ResourceTemplate() + { + WordBusNumber ( + ResourceProducer, + MinFixed, + MaxFixed, + PosDecode, + 0x0000, + 0x0000, + 0x00FF, + 0x0000, + 0x0100 + ) + + Io (Decode16, 0x70, 0x77, 0x01, 0x08) + Io (Decode16, 0xCF8, 0xCF8, 0x01, 0x08) + + DWordIO ( + ResourceProducer, + MinFixed, + MaxFixed, + PosDecode, + EntireRange, + 0x0000, + 0x0000, + 0x006F, + 0x0000, + 0x0070 + ) + + DWordIO ( + ResourceProducer, + MinFixed, + MaxFixed, + PosDecode, + EntireRange, + 0x0000, + 0x0078, + 0x0CF7, + 0x0000, + 0x0C80 + ) + + DWordIO ( + ResourceProducer, + MinFixed, + MaxFixed, + PosDecode, + EntireRange, + 0x0000, + 0x0D00, + 0xFFFF, + 0x0000, + 0xF300 + ) + + DWordMemory ( + ResourceProducer, + PosDecode, + MinFixed, + MaxFixed, + Cacheable, + ReadWrite, + 0x00000000, + 0x000A0000, + 0x000BFFFF, + 0x00000000, + 0x00020000 + ) + + DWordMemory ( + ResourceProducer, + PosDecode, + MinFixed, + MaxFixed, + Cacheable, + ReadWrite, + 0x00000000, + 0x000C0000, + 0x000DFFFF, + 0x00000000, + 0x00020000 + ) + + DWordMemory ( + ResourceProducer, + PosDecode, + MinFixed, + MaxFixed, + Cacheable, + ReadWrite, + 0x00000000, + 0x000E0000, + 0x000FFFFF, + 0x00000000, + 0x00020000 + ) + + DWordMemory ( + ResourceProducer, + PosDecode, + MinFixed, + MaxFixed, + Cacheable, + ReadWrite, + 0x00000000, + 0x3be00000, + 0x3FFFFFFF, + 0x00000000, + 0x04200000 + ,,, + STOM + ) + + DWordMemory ( + ResourceProducer, + PosDecode, + MinFixed, + MaxFixed, + NonCacheable, + ReadWrite, + 0x00000000, + 0x80000000, + 0xBFFFFFFF, + 0x00000000, + 0x40000000 + ,,, + PM01 + ) + + + DWordMemory ( + ResourceProducer, + PosDecode, + MinFixed, + MaxFixed, + NonCacheable, + ReadWrite, + 0x00000000, + 0xE0000000, + 0xEFFFFFFF, + 0x00000000, + 0x10000000 + ) + + DWordMemory ( + ResourceProducer, + PosDecode, + MinFixed, + MaxFixed, + NonCacheable, + ReadWrite, + 0x00000000, + 0xFEA00000, + 0xFEAFFFFF, + 0x00000000, + 0x00100000 + ) + + DWordMemory ( + ResourceProducer, + PosDecode, + MinFixed, + MaxFixed, + NonCacheable, + ReadWrite, + 0x00000000, + 0xFED00000, + 0xFED003FF, + 0x00000000, + 0x00000400 + ) + + DWordMemory ( + ResourceProducer, + PosDecode, + MinFixed, + MaxFixed, + NonCacheable, + ReadWrite, + 0x00000000, + 0xFED01000, + 0xFED01FFF, + 0x00000000, + 0x00001000 + ) + + DWordMemory ( + ResourceProducer, + PosDecode, + MinFixed, + MaxFixed, + NonCacheable, + ReadWrite, + 0x00000000, + 0xFED03000, + 0xFED03FFF, + 0x00000000, + 0x00001000 + ) + + DWordMemory ( + ResourceProducer, + PosDecode, + MinFixed, + MaxFixed, + NonCacheable, + ReadWrite, + 0x00000000, + 0xFED06000, + 0xFED06FFF, + 0x00000000, + 0x00001000 + ) + + DWordMemory ( + ResourceProducer, + PosDecode, + MinFixed, + MaxFixed, + NonCacheable, + ReadWrite, + 0x00000000, + 0xFED08000, + 0xFED09FFF, + 0x00000000, + 0x00002000 + ) + + DWordMemory ( + ResourceProducer, + PosDecode, + MinFixed, + MaxFixed, + NonCacheable, + ReadWrite, + 0x00000000, + 0xFED80000, + 0xFEDBFFFF, + 0x00000000, + 0x00040000 + ) + + DWordMemory ( + ResourceProducer, + PosDecode, + MinFixed, + MaxFixed, + NonCacheable, + ReadWrite, + 0x00000000, + 0xFED1C000 , + 0xFED1CFFF, + 0x00000000, + 0x00001000 + ) + + DWordMemory ( + ResourceProducer, + PosDecode, + MinFixed, + MaxFixed, + NonCacheable, + ReadOnly, + 0x00000000, + 0xFEE00000, + 0xFEEFFFFF, + 0x00000000, + 0x00100000 + ) + + QWordMemory( + ResourceProducer, + PosDecode, + MinFixed, + MaxFixed, + NonCacheable, + ReadWrite, + 0x00000000, + 0x000000000, + 0x000000000, + 0x00000000, + 0x000000000 + ,,, + PM03 + ) + }) + + CreateDwordField(MCRS, PM01._MIN, PMIN) + CreateDwordField(MCRS, PM01._MAX, PMAX) + CreateDwordField(MCRS, PM01._LEN, PLEN) + + Store (A4GS, PLEN) + Store (A4GB, PMIN) + Subtract (Add (PMIN, PLEN), 1, PMAX) + + CreateDwordField(MCRS, STOM._MIN, GMIN) + CreateDwordField(MCRS, STOM._MAX, GMAX) + CreateDwordField(MCRS, STOM._LEN, GLEN) + + Store(^MCHC.BDSM, GMIN) + + And(^MCHC.TOLD, 0xFFFFF000, GMAX) + Decrement(GMAX) + + Add(Subtract(GMAX, GMIN), 1, GLEN) + + CreateQwordField(MCRS, PM03._LEN, MMIN) + CreateQwordField(MCRS, PM03._MIN, MMAX) + CreateQwordField(MCRS, PM03._MAX, MLEN) + Store(MAB, MMAX) + Store(MAM, MLEN) + Store(MAL, MMIN) + + Return(MCRS) +} + +#include "pdrc.asl" + +/* GFX 00:02.0 */ +#include <drivers/intel/gma/acpi/gfx.asl> diff --git a/src/soc/intel/apollolake/acpi/pdrc.asl b/src/soc/intel/apollolake/acpi/pdrc.asl new file mode 100644 index 0000000..c7bcb03 --- /dev/null +++ b/src/soc/intel/apollolake/acpi/pdrc.asl @@ -0,0 +1,44 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +/* PCI Device Resource Consumption */ +Device (PDRC) +{ + Name (_HID, EISAID ("PNP0C02")) + Name (_UID, 1) + + Method (_CRS, 0, Serialized) + { + Name (BUF0, ResourceTemplate () + { + /* PCIEX BAR */ + Memory32Fixed (ReadWrite, 0x0e0000000, 0x010000000, PCIX) + + /* MPHY BAR */ + Memory32Fixed (ReadWrite, 0x0fea00000, 0x0100000, MPHB) + + /* SPI BAR */ + Memory32Fixed (ReadWrite, 0x0fed01000, 0x01000, SPIB) + + /* PMC BAR */ + Memory32Fixed (ReadWrite, 0x0fed03000, 0x01000, PMCB) + + /* PUNIT BAR */ + Memory32Fixed (ReadWrite, 0x0fed06000, 0x01000, PUNB) + + /* ILB BAR */ + Memory32Fixed (ReadWrite, 0x0fed08000, 0x02000, ILBB) + + /* IO BAR */ + Memory32Fixed (ReadWrite, 0x0fed80000, 0x040000, IOBR) + + /* RCRB BAR */ + Memory32Fixed (ReadWrite, 0x0fed1c000, 0x01000, RCRB) + + /* Local APIC range */ + Memory32Fixed (ReadOnly, 0x0fee00000, 0x0100000, LIOH) + }) + + Return (BUF0) + } +} +
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Sean Rhodes (Code Review)