Change in coreboot[master]: mb/google/volteer: Enable HotPlug on PCIe root port for the SD express
Nick Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42897 )
Change subject: mb/google/volteer: Enable HotPlug on PCIe root port for the SD express ......................................................................
mb/google/volteer: Enable HotPlug on PCIe root port for the SD express
Enable HotPlug for the PCIe root port that the SD express is on so the OS can re-train the link without needing a reboot if it goes down unexpectedly at runtime.
BUG=b:156879564 BRANCH=master TEST=enable HotPlug on Volteer Root Port 7 (SD express) and check in linux that it is identified as a HotPlug capable root port
Signed-off-by: Nick Chen nick_xr_chen@wistron.corp-partner.google.com Change-Id: Ie9d427dd297567f06123119a670b5ed2e1f73701 --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb 1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/42897/1
diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index 0c581a5..48ea18f 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -88,6 +88,7 @@ register "PcieRpLtrEnable[7]" = "1" register "PcieClkSrcUsage[3]" = "7" register "PcieClkSrcClkReq[3]" = "3" + register "PcieRpHotPlug[7]" = "1"
# Enable WLAN PCIE 7 using clk 1 register "PcieRpEnable[6]" = "1"
Caveh Jalali has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42897 )
Change subject: mb/google/volteer: Enable HotPlug on PCIe root port for the SD express ......................................................................
Patch Set 1: Code-Review+1
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42897 )
Change subject: mb/google/volteer: Enable HotPlug on PCIe root port for the SD express ......................................................................
Patch Set 1: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/42897/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42897/1//COMMIT_MSG@9 PS1, Line 9: Enable HotPlug for the PCIe root port that the SD express is on so : the OS can re-train the link without needing a reboot if it goes : down unexpectedly at runtime. nit: I think you can reflow this for 72 character width.
Caveh Jalali has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42897 )
Change subject: mb/google/volteer: Enable HotPlug on PCIe root port for the SD express ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42897/1/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/42897/1/src/mainboard/google/voltee... PS1, Line 91: PcieRpHotPlug i should have noticed this last night - can you move this up 2 lines so it's grouped in the same section as the other PcieRp...[7] lines?
Hello build bot (Jenkins), Caveh Jalali, Tim Wawrzynczak, Nick Vaccaro,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42897
to look at the new patch set (#2).
Change subject: mb/google/volteer: Enable HotPlug on PCIe root port for the SD express ......................................................................
mb/google/volteer: Enable HotPlug on PCIe root port for the SD express
Enable HotPlug for the PCIe root port that the SD express is on so the OS can re-train the link without needing a reboot if it goes down unexpectedly at runtime.
BUG=b:156879564 BRANCH=master TEST=enable HotPlug on Volteer Root Port 7 (SD express) and check in linux that it is identified as a HotPlug capable root port
Signed-off-by: Nick Chen nick_xr_chen@wistron.corp-partner.google.com Change-Id: Ie9d427dd297567f06123119a670b5ed2e1f73701 --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb 1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/42897/2
Hello build bot (Jenkins), Caveh Jalali, Tim Wawrzynczak, Nick Vaccaro,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42897
to look at the new patch set (#3).
Change subject: mb/google/volteer: Enable HotPlug on PCIe root port for the SD express ......................................................................
mb/google/volteer: Enable HotPlug on PCIe root port for the SD express
Enable HotPlug for the PCIe root port that the SD express is on so the OS can re-train the link without needing a reboot if it goes down unexpectedly at runtime.
BUG=b:156879564 BRANCH=master TEST=enable HotPlug on Volteer Root Port 7 (SD express) and check in linux that it is identified as a HotPlug capable root port
Signed-off-by: Nick Chen nick_xr_chen@wistron.corp-partner.google.com Change-Id: Ie9d427dd297567f06123119a670b5ed2e1f73701 --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb 1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/42897/3
Nick Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42897 )
Change subject: mb/google/volteer: Enable HotPlug on PCIe root port for the SD express ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42897/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42897/1//COMMIT_MSG@9 PS1, Line 9: Enable HotPlug for the PCIe root port that the SD express is on so : the OS can re-train the link without needing a reboot if it goes : down unexpectedly at runtime.
nit: I think you can reflow this for 72 character width.
reflow complete
Hello build bot (Jenkins), Caveh Jalali, Tim Wawrzynczak, Nick Vaccaro,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42897
to look at the new patch set (#4).
Change subject: mb/google/volteer: Enable HotPlug on PCIe root port for the SD express ......................................................................
mb/google/volteer: Enable HotPlug on PCIe root port for the SD express
Enable HotPlug for the PCIe root port that the SD express is on so the OS can re-train the link without needing a reboot if it goes down unexpectedly at runtime.
BUG=b:156879564 BRANCH=master TEST=enable HotPlug on Volteer Root Port 7 (SD express) and check in linux that it is identified as a HotPlug capable root port
Signed-off-by: Nick Chen nick_xr_chen@wistron.corp-partner.google.com Change-Id: Ie9d427dd297567f06123119a670b5ed2e1f73701 --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb 1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/42897/4
Nick Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42897 )
Change subject: mb/google/volteer: Enable HotPlug on PCIe root port for the SD express ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42897/1/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/42897/1/src/mainboard/google/voltee... PS1, Line 91: PcieRpHotPlug
i should have noticed this last night - can you move this up 2 lines so it's […]
up 2 lines complete
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42897 )
Change subject: mb/google/volteer: Enable HotPlug on PCIe root port for the SD express ......................................................................
Patch Set 4: Code-Review+2
Nick Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42897 )
Change subject: mb/google/volteer: Enable HotPlug on PCIe root port for the SD express ......................................................................
Patch Set 4: Code-Review+1
Tim Wawrzynczak has submitted this change. ( https://review.coreboot.org/c/coreboot/+/42897 )
Change subject: mb/google/volteer: Enable HotPlug on PCIe root port for the SD express ......................................................................
mb/google/volteer: Enable HotPlug on PCIe root port for the SD express
Enable HotPlug for the PCIe root port that the SD express is on so the OS can re-train the link without needing a reboot if it goes down unexpectedly at runtime.
BUG=b:156879564 BRANCH=master TEST=enable HotPlug on Volteer Root Port 7 (SD express) and check in linux that it is identified as a HotPlug capable root port
Signed-off-by: Nick Chen nick_xr_chen@wistron.corp-partner.google.com Change-Id: Ie9d427dd297567f06123119a670b5ed2e1f73701 Reviewed-on: https://review.coreboot.org/c/coreboot/+/42897 Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb 1 file changed, 1 insertion(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved Nick Chen: Looks good to me, but someone else must approve
diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index 300fb7e..88aff01 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -86,6 +86,7 @@ # Enable SD Card PCIE 8 using clk 3 register "PcieRpEnable[7]" = "1" register "PcieRpLtrEnable[7]" = "1" + register "PcieRpHotPlug[7]" = "1" register "PcieClkSrcUsage[3]" = "7" register "PcieClkSrcClkReq[3]" = "3"
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Caveh Jalali (Code Review) -
Nick Chen (Code Review)
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Tim Wawrzynczak (Code Review)