Christian Walter has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45868 )
Change subject: soc/intel/xeon_sp/cpx: Set CPU_ADDR_BITS to 46 ......................................................................
soc/intel/xeon_sp/cpx: Set CPU_ADDR_BITS to 46
According to document number 338846 this should be set to 46 bits.
Change-Id: I0bbe6c962ffc7d5dc722f1cacf55bc0d0615db59 Signed-off-by: Christian Walter christian.walter@9elements.com --- M src/soc/intel/xeon_sp/cpx/Kconfig 1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/45868/1
diff --git a/src/soc/intel/xeon_sp/cpx/Kconfig b/src/soc/intel/xeon_sp/cpx/Kconfig index 8e7e6f1..975afc9 100644 --- a/src/soc/intel/xeon_sp/cpx/Kconfig +++ b/src/soc/intel/xeon_sp/cpx/Kconfig @@ -15,6 +15,10 @@ int default 255
+config CPU_ADDR_BITS + int + default 46 + config PCR_BASE_ADDRESS hex default 0xfd000000
Jonathan Zhang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45868 )
Change subject: soc/intel/xeon_sp/cpx: Set CPU_ADDR_BITS to 46 ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45868/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45868/1//COMMIT_MSG@9 PS1, Line 9: According to document number 338846 this should be set to 46 bits. Please check SKX-SP doc as well. The default also does not apply to SKX-SP.
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45868 )
Change subject: soc/intel/xeon_sp/cpx: Set CPU_ADDR_BITS to 46 ......................................................................
Patch Set 3: Code-Review+2
Hello build bot (Jenkins), Marc Jones, Jonathan Zhang, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45868
to look at the new patch set (#4).
Change subject: soc/intel/xeon_sp: Set CPU_ADDR_BITS to 46 for SKX and CPX ......................................................................
soc/intel/xeon_sp: Set CPU_ADDR_BITS to 46 for SKX and CPX
According to document number 338846 and 336062 this should be set to 46 bits.
Change-Id: I0bbe6c962ffc7d5dc722f1cacf55bc0d0615db59 Signed-off-by: Christian Walter christian.walter@9elements.com --- M src/soc/intel/xeon_sp/cpx/Kconfig M src/soc/intel/xeon_sp/skx/Kconfig 2 files changed, 8 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/45868/4
Christian Walter has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45868 )
Change subject: soc/intel/xeon_sp: Set CPU_ADDR_BITS to 46 for SKX and CPX ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45868/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45868/1//COMMIT_MSG@9 PS1, Line 9: According to document number 338846 this should be set to 46 bits.
Please check SKX-SP doc as well. The default also does not apply to SKX-SP.
Done
Philipp Deppenwiese has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45868 )
Change subject: soc/intel/xeon_sp: Set CPU_ADDR_BITS to 46 for SKX and CPX ......................................................................
Patch Set 4: Code-Review+2
Philipp Deppenwiese has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45868 )
Change subject: soc/intel/xeon_sp: Set CPU_ADDR_BITS to 46 for SKX and CPX ......................................................................
soc/intel/xeon_sp: Set CPU_ADDR_BITS to 46 for SKX and CPX
According to document number 338846 and 336062 this should be set to 46 bits.
Change-Id: I0bbe6c962ffc7d5dc722f1cacf55bc0d0615db59 Signed-off-by: Christian Walter christian.walter@9elements.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/45868 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Philipp Deppenwiese zaolin.daisuki@gmail.com --- M src/soc/intel/xeon_sp/cpx/Kconfig M src/soc/intel/xeon_sp/skx/Kconfig 2 files changed, 8 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Philipp Deppenwiese: Looks good to me, approved
diff --git a/src/soc/intel/xeon_sp/cpx/Kconfig b/src/soc/intel/xeon_sp/cpx/Kconfig index 8e7e6f1..975afc9 100644 --- a/src/soc/intel/xeon_sp/cpx/Kconfig +++ b/src/soc/intel/xeon_sp/cpx/Kconfig @@ -15,6 +15,10 @@ int default 255
+config CPU_ADDR_BITS + int + default 46 + config PCR_BASE_ADDRESS hex default 0xfd000000 diff --git a/src/soc/intel/xeon_sp/skx/Kconfig b/src/soc/intel/xeon_sp/skx/Kconfig index 0e3e699..2e0778e 100644 --- a/src/soc/intel/xeon_sp/skx/Kconfig +++ b/src/soc/intel/xeon_sp/skx/Kconfig @@ -15,6 +15,10 @@ int default 2
+config CPU_ADDR_BITS + int + default 46 + # For 2S config, the number of cpus could be as high as # 2 threads * 20 cores * 2 sockets config MAX_CPUS