Attention is currently required from: Angel Pons. Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58538 )
Change subject: mainboard/starlabs: Add LabTop Mk III ......................................................................
Patch Set 55:
(5 comments)
This change is ready for review.
File src/mainboard/starlabs/labtop/dsdt.asl:
https://review.coreboot.org/c/coreboot/+/58538/comment/f0584085_22f367b1 PS50, Line 20: BOARD_STARLABS_LABTOP_KBL
SOC_INTEL_COMMON_SKYLAKE_BASE
Done
File src/mainboard/starlabs/labtop/variants/kbl/board.fmd:
https://review.coreboot.org/c/coreboot/+/58538/comment/2f1ddd6d_e49836c0 PS50, Line 2: # Manually defined FMD in order to ensure that space is reserved for the EC
I don't see any regions for the EC firmware. […]
Removed the comment but would prefer to keep it - seen strange behaviour when changing layouts.
File src/mainboard/starlabs/labtop/variants/kbl/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/58538/comment/8314fd14_e0c30538 PS50, Line 53: register "PcieRpClkReqNumber[0]" = "0xFF" : register "PcieRpClkReqNumber[1]" = "0xFF" : register "PcieRpClkReqNumber[2]" = "0xFF" : register "PcieRpClkReqNumber[3]" = "0xFF" : register "PcieRpClkReqNumber[4]" = "0xFF" : register "PcieRpClkReqNumber[6]" = "0xFF"
Shouldn't be needed if `PcieRpClkReqSupport` is not set.
Done
https://review.coreboot.org/c/coreboot/+/58538/comment/c13fb702_78a4c382 PS50, Line 77: # Internal Webcam : register "usb2_ports[3]" = "USB2_PORT_MID(OC0)" : # Daughterboard SD Card : register "usb2_ports[7]" = "USB2_PORT_MID(OC0)" : # Internal Bluetooth : register "usb2_ports[9]" = "USB2_PORT_MID(OC0)"
Internal USB ports shouldn't be assigned to an overcurrent pin
Done
https://review.coreboot.org/c/coreboot/+/58538/comment/3b975b8b_bd38fe60 PS50, Line 189: subsystemid 0x10ec 0x111e
This sets the subsystem ID for the HDA PCI device, not the codec. […]
Done
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Sean Rhodes (Code Review)