Change in coreboot[master]: mb/google/guybrush: Update bootblock power-on timings for PCIe

[Martin Roth (Code Review)]

Attention is currently required from: Raul Rangel, Rob Barnes.
Hello build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/52868

to look at the new patch set (#7).

Change subject: mb/google/guybrush: Update bootblock power-on timings for PCIe
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mb/google/guybrush: Update bootblock power-on timings for PCIe

This configures the bootblock portion of the PCIe GPIOs in the correct
sequence to meet the power-on timings.

Setting the PCIE Reset happens in coreboot instead of in the FSP.

The Aux reset lines are anded with the PCIe RST line, so both have
to be brought up together.  On v1 of guybrush, the PCIe reset line
also resets EC communication, so it must be brought up immediately on
that version.

BUG=b:184796302, b:184598323
TEST=Verify timings between GPIO init sections.  All available modules
are present after training.

Signed-off-by: Martin Roth 
Change-Id: I2d0b812b654b0cd317a2c8c1ce554e850c96be44
---
M src/mainboard/google/guybrush/bootblock.c
M src/mainboard/google/guybrush/port_descriptors.c
M src/mainboard/google/guybrush/variants/baseboard/gpio.c
M src/mainboard/google/guybrush/variants/baseboard/include/baseboard/variants.h
M src/mainboard/google/guybrush/variants/guybrush/Makefile.inc
M src/mainboard/google/guybrush/variants/guybrush/gpio.c
6 files changed, 155 insertions(+), 21 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/52868/7