Bonnie Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32680
Change subject: mb/google/sarien/variants/arcada: Set tcc offset value ......................................................................
mb/google/sarien/variants/arcada: Set tcc offset value
Set tcc offset value to 1 degree celsius for Arcada system.
BRANCH=None BUG=b:122636962 TEST=Built and tested on Arcada system
Change-Id: I3ca4be2f7b92e29fb133ecc32023526b177d2ac2 --- M src/mainboard/google/sarien/variants/arcada/devicetree.cb 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/32680/1
diff --git a/src/mainboard/google/sarien/variants/arcada/devicetree.cb b/src/mainboard/google/sarien/variants/arcada/devicetree.cb index 0cc9970..27c61f3 100644 --- a/src/mainboard/google/sarien/variants/arcada/devicetree.cb +++ b/src/mainboard/google/sarien/variants/arcada/devicetree.cb @@ -161,7 +161,7 @@ #| I2C4 | H1 TPM | #+-------------------+---------------------------+
- register "tcc_offset" = "10" + register "tcc_offset" = "1"
register "common_soc_config" = "{ .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32680
to look at the new patch set (#2).
Change subject: mb/google/sarien/variants/arcada: Set tcc offset value ......................................................................
mb/google/sarien/variants/arcada: Set tcc offset value
Set tcc offset value to 1 degree celsius for Arcada system.
BRANCH=None BUG=b:122636962 TEST=Built and tested on Arcada system
Signed-off-by: Bonnie Lin bonnie_ty_lin@wistron.corp-partner.google.com Change-Id: I3ca4be2f7b92e29fb133ecc32023526b177d2ac2 --- M src/mainboard/google/sarien/variants/arcada/devicetree.cb 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/32680/2
Casper Chang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32680 )
Change subject: mb/google/sarien/variants/arcada: Set tcc offset value ......................................................................
Patch Set 2: Code-Review+1
Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32680 )
Change subject: mb/google/sarien/variants/arcada: Set tcc offset value ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/32680/2/src/mainboard/google/sarien/variants... File src/mainboard/google/sarien/variants/arcada/devicetree.cb:
https://review.coreboot.org/#/c/32680/2/src/mainboard/google/sarien/variants... PS2, Line 164: 1 How did you arrive to this number ?
Wency Chang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32680 )
Change subject: mb/google/sarien/variants/arcada: Set tcc offset value ......................................................................
Patch Set 2:
Patch Set 2:
(1 comment)
Leverage from BANDON setting which already fine tuned.
Lijian Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32680 )
Change subject: mb/google/sarien/variants/arcada: Set tcc offset value ......................................................................
Patch Set 2: Code-Review+2
Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32680 )
Change subject: mb/google/sarien/variants/arcada: Set tcc offset value ......................................................................
Patch Set 2: Code-Review+2
Patch Set 2:
Patch Set 2:
(1 comment)
Leverage from BANDON setting which already fine tuned.
Thanks for this info. I will review this patch.
Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/32680 )
Change subject: mb/google/sarien/variants/arcada: Set tcc offset value ......................................................................
mb/google/sarien/variants/arcada: Set tcc offset value
Set tcc offset value to 1 degree celsius for Arcada system.
BRANCH=None BUG=b:122636962 TEST=Built and tested on Arcada system
Signed-off-by: Bonnie Lin bonnie_ty_lin@wistron.corp-partner.google.com Change-Id: I3ca4be2f7b92e29fb133ecc32023526b177d2ac2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/32680 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Casper Chang casper_chang@wistron.corp-partner.google.com Reviewed-by: Lijian Zhao lijian.zhao@intel.com Reviewed-by: Sumeet R Pawnikar sumeet.r.pawnikar@intel.com --- M src/mainboard/google/sarien/variants/arcada/devicetree.cb 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Lijian Zhao: Looks good to me, approved Sumeet R Pawnikar: Looks good to me, approved Casper Chang: Looks good to me, but someone else must approve
diff --git a/src/mainboard/google/sarien/variants/arcada/devicetree.cb b/src/mainboard/google/sarien/variants/arcada/devicetree.cb index 0cc9970..27c61f3 100644 --- a/src/mainboard/google/sarien/variants/arcada/devicetree.cb +++ b/src/mainboard/google/sarien/variants/arcada/devicetree.cb @@ -161,7 +161,7 @@ #| I2C4 | H1 TPM | #+-------------------+---------------------------+
- register "tcc_offset" = "10" + register "tcc_offset" = "1"
register "common_soc_config" = "{ .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
-
Bonnie Lin (Code Review) -
Casper Chang (Code Review)
-
Lijian Zhao (Code Review)
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Patrick Georgi (Code Review)
-
Sumeet R Pawnikar (Code Review)
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Wency Chang (Code Review)