Attention is currently required from: Hung-Te Lin. Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/55156
to look at the new patch set (#4).
Change subject: mb/google/cherry: Get RAM code from ADC ......................................................................
mb/google/cherry: Get RAM code from ADC
On Chromebooks the RAM code is implemented by the resistor straps that we can read and decode from ADC. For Cherry the RAM code can be read from ADC channel 2 and 3.
Signed-off-by: Rex-BC Chen rex-bc.chen@mediatek.com Change-Id: I4f28bc1c567cb886bd90d930219981a6206b9bb9 --- M src/mainboard/google/cherry/boardid.c M src/soc/mediatek/mt8195/include/soc/auxadc.h 2 files changed, 61 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/55156/4