[M] Change in coreboot[master]: soc/amd/mendocino: Remove the SPL DPTC parameter

[Frank Wu (Code Review)]

Attention is currently required from: Jason Glenesk, Raul Rangel, Jason Nien, EricKY Cheng, Matt DeVillier, Isaac Lee, Chris Wang, Martin Roth, Tim Van Patten, Fred Reitberger, Felix Held.

Frank Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73124 )

Change subject: soc/amd/mendocino: Remove the SPL DPTC parameter
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Patch Set 6:

(1 comment)

File src/mainboard/google/skyrim/variants/baseboard/devicetree.cb:

https://review.coreboot.org/c/coreboot/+/73124/comment/3a247cee_a2dbb407 
PS6, Line 263: # Remove the sustained_power_limit_mW when STT is enabled
             : 	register "sustained_power_limit_mW"              = "15000"
Should the sustained_power_limit_mW move to skyrim/overridetree.cb from here?

Based on the experience, the sustained_power_limit_mW will be used in all the overridetree.cb if it is included in baseboard/devicetree.cb.

Is there a way to remove sustained_power_limit_mW if it is already configured in baseboard/devicetree.cb?