[M] Change in coreboot[main]: soc/mediatek: Allow specifying multiple EINT base registers
Yu-Ping Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86033?usp=email )
Change subject: soc/mediatek: Allow specifying multiple EINT base registers ......................................................................
soc/mediatek: Allow specifying multiple EINT base registers
Unlike MT8186/MT8188/MT8192/MT8195, MT8196 has 5 EINT base registers, each with a different number of EINT bits. In preparation for the upcoming MT8196 EINT unmasking support, replace the `eint_event_reg` struct (which has a hardcoded register number) with an array `eint_event` to specify the EINT base register(s).
BUG=none TEST=emerge-geralt coreboot BRANCH=none
Change-Id: I86fd3109c9ff72f33b9fea45587d012b003a34ba Signed-off-by: Yu-Ping Wu yupingso@chromium.org --- M src/soc/mediatek/common/eint_event.c A src/soc/mediatek/common/eint_event_info.c M src/soc/mediatek/common/include/soc/eint_event.h M src/soc/mediatek/mt8186/Makefile.mk M src/soc/mediatek/mt8188/Makefile.mk M src/soc/mediatek/mt8192/Makefile.mk M src/soc/mediatek/mt8195/Makefile.mk 7 files changed, 44 insertions(+), 15 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/86033/1
diff --git a/src/soc/mediatek/common/eint_event.c b/src/soc/mediatek/common/eint_event.c index b3538a1..6e44b37 100644 --- a/src/soc/mediatek/common/eint_event.c +++ b/src/soc/mediatek/common/eint_event.c @@ -1,10 +1,30 @@ /* SPDX-License-Identifier: GPL-2.0-only */
+#include <commonlib/bsd/helpers.h> +#include <device/mmio.h> #include <soc/eint_event.h> +#include <types.h> + +/* EINT reg_base + 0x880 is eint_event_mask_clr register with access type W1C. */ +#define EINT_EVENT_MASK_CLR_OFFSET 0x880 + +#define EINT_VALUE 0xFFFFFFFF + +static void enable_eint_event(const struct eint_event_info *event) +{ + uint32_t *reg = (uint32_t *)(event->reg_base + EINT_EVENT_MASK_CLR_OFFSET); + size_t port = DIV_ROUND_UP(event->eint_num, sizeof(*reg) * BITS_PER_BYTE); + int i; + + for (i = 0; i < port; i++) + write32p(reg[i], EINT_VALUE); +}
void unmask_eint_event_mask(void) { - int i; - for (i = 0; i < ARRAY_SIZE(mtk_eint_event->eint_event_mask_clr); i++) - write32(&mtk_eint_event->eint_event_mask_clr[i], 0xffffffff); + const struct eint_event_info *event = &eint_event[0]; + while (event->reg_base && event->eint_num) { + enable_eint_event(event); + event++; + } } diff --git a/src/soc/mediatek/common/eint_event_info.c b/src/soc/mediatek/common/eint_event_info.c new file mode 100644 index 0000000..706cca8 --- /dev/null +++ b/src/soc/mediatek/common/eint_event_info.c @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR MIT */ + +#include <soc/addressmap.h> +#include <soc/eint_event.h> + +const struct eint_event_info eint_event[] = { + { EINT_BASE, 224 }, + {}, +}; diff --git a/src/soc/mediatek/common/include/soc/eint_event.h b/src/soc/mediatek/common/include/soc/eint_event.h index 6d544b4..eab51ed 100644 --- a/src/soc/mediatek/common/include/soc/eint_event.h +++ b/src/soc/mediatek/common/include/soc/eint_event.h @@ -3,18 +3,18 @@ #ifndef SOC_MEDIATEK_COMMON_EINT_EVENT_H #define SOC_MEDIATEK_COMMON_EINT_EVENT_H
-#include <device/mmio.h> -#include <soc/addressmap.h> +#include <stddef.h> +#include <stdint.h>
-/* eint event mask clear register */ -struct eint_event_reg { - uint32_t eint_event_mask_clr[7]; +struct eint_event_info { + uintptr_t reg_base; + size_t eint_num; };
-/* eint_base + 0x880 is eint_event_mask_clr register with access type W1C. */ -static struct eint_event_reg *const mtk_eint_event = (void *)(EINT_BASE + 0x880); +/* An element { 0, 0 } indicates the end of array. */ +extern const struct eint_event_info eint_event[];
-/* unmask eint event, eint can wakeup by spm */ +/* Unmask eint event, which can be waken up by SPM. */ void unmask_eint_event_mask(void);
#endif diff --git a/src/soc/mediatek/mt8186/Makefile.mk b/src/soc/mediatek/mt8186/Makefile.mk index 0d44c2e..c4a3f21 100644 --- a/src/soc/mediatek/mt8186/Makefile.mk +++ b/src/soc/mediatek/mt8186/Makefile.mk @@ -12,7 +12,7 @@ all-y += ../common/uart.c
bootblock-y += bootblock.c -bootblock-y += ../common/eint_event.c +bootblock-y += ../common/eint_event.c ../common/eint_event_info.c bootblock-y += gic.c bootblock-y += ../common/lastbus_v1.c bootblock-y += ../common/mmu_operations.c diff --git a/src/soc/mediatek/mt8188/Makefile.mk b/src/soc/mediatek/mt8188/Makefile.mk index 2f1a0f5..2c8379e 100644 --- a/src/soc/mediatek/mt8188/Makefile.mk +++ b/src/soc/mediatek/mt8188/Makefile.mk @@ -10,7 +10,7 @@ all-y += ../common/uart.c
bootblock-y += ../common/bootblock.c bootblock.c -bootblock-y += ../common/eint_event.c +bootblock-y += ../common/eint_event.c ../common/eint_event_info.c bootblock-y += ../common/lastbus_v2.c lastbus.c bootblock-y += ../common/mmu_operations.c bootblock-y += ../common/tracker.c ../common/tracker_v2.c diff --git a/src/soc/mediatek/mt8192/Makefile.mk b/src/soc/mediatek/mt8192/Makefile.mk index 1c4baa8..b2c3ced 100644 --- a/src/soc/mediatek/mt8192/Makefile.mk +++ b/src/soc/mediatek/mt8192/Makefile.mk @@ -10,7 +10,7 @@ all-y += ../common/uart.c
bootblock-y += bootblock.c -bootblock-y += ../common/eint_event.c +bootblock-y += ../common/eint_event.c ../common/eint_event_info.c bootblock-y += ../common/mmu_operations.c bootblock-y += ../common/pll.c pll.c bootblock-y += ../common/tracker.c ../common/tracker_v2.c diff --git a/src/soc/mediatek/mt8195/Makefile.mk b/src/soc/mediatek/mt8195/Makefile.mk index 7c3d3f4..ecc6965 100644 --- a/src/soc/mediatek/mt8195/Makefile.mk +++ b/src/soc/mediatek/mt8195/Makefile.mk @@ -11,7 +11,7 @@
bootblock-y += bootblock.c bootblock-y += ../common/early_init.c -bootblock-y += ../common/eint_event.c +bootblock-y += ../common/eint_event.c ../common/eint_event_info.c bootblock-y += ../common/mmu_operations.c bootblock-$(CONFIG_PCI) += ../common/pcie.c pcie.c bootblock-y += ../common/pll.c pll.c
-
Yu-Ping Wu (Code Review)