Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42937 )
Change subject: mb/google/zork: Move GPIO sleep table to dalboz and trembyle reference ......................................................................
mb/google/zork: Move GPIO sleep table to dalboz and trembyle reference
This change moves variant_sleep_gpio_table() definition to dalboz and trembyle references to allow each to make their own changes.
BUG=b:159749536, b:159453643
Signed-off-by: Furquan Shaikh furquan@google.com Change-Id: I15b19cea05f1a540c56b6bc0507306d2348ac17f --- M src/mainboard/google/zork/variants/baseboard/Makefile.inc M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_common.c M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c 4 files changed, 36 insertions(+), 18 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/42937/1
diff --git a/src/mainboard/google/zork/variants/baseboard/Makefile.inc b/src/mainboard/google/zork/variants/baseboard/Makefile.inc index 0f025e0..c09fc7e 100644 --- a/src/mainboard/google/zork/variants/baseboard/Makefile.inc +++ b/src/mainboard/google/zork/variants/baseboard/Makefile.inc @@ -24,7 +24,8 @@ ramstage-y += helpers.c ramstage-y += tpm_tis.c
-smm-y += gpio_baseboard_common.c +smm-$(CONFIG_BOARD_GOOGLE_BASEBOARD_TREMBYLE) += gpio_baseboard_trembyle.c +smm-$(CONFIG_BOARD_GOOGLE_BASEBOARD_DALBOZ) += gpio_baseboard_dalboz.c
# Add OEM ID table ifeq ($(CONFIG_USE_OEM_BIN),y) diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_common.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_common.c index aacf14b..a4e8648 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_common.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_common.c @@ -30,20 +30,3 @@ *size = ARRAY_SIZE(early_gpio_table); return early_gpio_table; } - -static const struct soc_amd_gpio gpio_sleep_table[] = { - /* PEN_POWER_EN */ - PAD_GPO(GPIO_5, LOW), - /* PCIE_RST1_L */ - PAD_GPO(GPIO_27, LOW), - /* NVME_AUX_RESET_L */ - PAD_GPO(GPIO_40, LOW), - /* EN_PWR_CAMERA */ - PAD_GPO(GPIO_76, LOW), -}; - -const __weak struct soc_amd_gpio *variant_sleep_gpio_table(size_t *size, int slp_typ) -{ - *size = ARRAY_SIZE(gpio_sleep_table); - return gpio_sleep_table; -} diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c index 2b6f516..5f007f7 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c @@ -279,3 +279,20 @@ else wifi_power_reset_configure_pre_v3(); } + +static const struct soc_amd_gpio gpio_sleep_table[] = { + /* PEN_POWER_EN */ + PAD_GPO(GPIO_5, LOW), + /* PCIE_RST1_L */ + PAD_GPO(GPIO_27, LOW), + /* NVME_AUX_RESET_L */ + PAD_GPO(GPIO_40, LOW), + /* EN_PWR_CAMERA */ + PAD_GPO(GPIO_76, LOW), +}; + +const __weak struct soc_amd_gpio *variant_sleep_gpio_table(size_t *size, int slp_typ) +{ + *size = ARRAY_SIZE(gpio_sleep_table); + return gpio_sleep_table; +} diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c index 01aef2b..a395e2e 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c @@ -271,3 +271,20 @@ else wifi_power_reset_configure_pre_v3(); } + +static const struct soc_amd_gpio gpio_sleep_table[] = { + /* PEN_POWER_EN */ + PAD_GPO(GPIO_5, LOW), + /* PCIE_RST1_L */ + PAD_GPO(GPIO_27, LOW), + /* NVME_AUX_RESET_L */ + PAD_GPO(GPIO_40, LOW), + /* EN_PWR_CAMERA */ + PAD_GPO(GPIO_76, LOW), +}; + +const __weak struct soc_amd_gpio *variant_sleep_gpio_table(size_t *size, int slp_typ) +{ + *size = ARRAY_SIZE(gpio_sleep_table); + return gpio_sleep_table; +}
Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42937 )
Change subject: mb/google/zork: Move GPIO sleep table to dalboz and trembyle reference ......................................................................
Patch Set 1: Code-Review+2
Furquan Shaikh has submitted this change. ( https://review.coreboot.org/c/coreboot/+/42937 )
Change subject: mb/google/zork: Move GPIO sleep table to dalboz and trembyle reference ......................................................................
mb/google/zork: Move GPIO sleep table to dalboz and trembyle reference
This change moves variant_sleep_gpio_table() definition to dalboz and trembyle references to allow each to make their own changes.
BUG=b:159749536, b:159453643
Signed-off-by: Furquan Shaikh furquan@google.com Change-Id: I15b19cea05f1a540c56b6bc0507306d2348ac17f Reviewed-on: https://review.coreboot.org/c/coreboot/+/42937 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Aaron Durbin adurbin@chromium.org --- M src/mainboard/google/zork/variants/baseboard/Makefile.inc M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_common.c M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c 4 files changed, 36 insertions(+), 18 deletions(-)
Approvals: build bot (Jenkins): Verified Aaron Durbin: Looks good to me, approved
diff --git a/src/mainboard/google/zork/variants/baseboard/Makefile.inc b/src/mainboard/google/zork/variants/baseboard/Makefile.inc index 0f025e0..c09fc7e 100644 --- a/src/mainboard/google/zork/variants/baseboard/Makefile.inc +++ b/src/mainboard/google/zork/variants/baseboard/Makefile.inc @@ -24,7 +24,8 @@ ramstage-y += helpers.c ramstage-y += tpm_tis.c
-smm-y += gpio_baseboard_common.c +smm-$(CONFIG_BOARD_GOOGLE_BASEBOARD_TREMBYLE) += gpio_baseboard_trembyle.c +smm-$(CONFIG_BOARD_GOOGLE_BASEBOARD_DALBOZ) += gpio_baseboard_dalboz.c
# Add OEM ID table ifeq ($(CONFIG_USE_OEM_BIN),y) diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_common.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_common.c index aacf14b..a4e8648 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_common.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_common.c @@ -30,20 +30,3 @@ *size = ARRAY_SIZE(early_gpio_table); return early_gpio_table; } - -static const struct soc_amd_gpio gpio_sleep_table[] = { - /* PEN_POWER_EN */ - PAD_GPO(GPIO_5, LOW), - /* PCIE_RST1_L */ - PAD_GPO(GPIO_27, LOW), - /* NVME_AUX_RESET_L */ - PAD_GPO(GPIO_40, LOW), - /* EN_PWR_CAMERA */ - PAD_GPO(GPIO_76, LOW), -}; - -const __weak struct soc_amd_gpio *variant_sleep_gpio_table(size_t *size, int slp_typ) -{ - *size = ARRAY_SIZE(gpio_sleep_table); - return gpio_sleep_table; -} diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c index c243876..d6d463a 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c @@ -277,3 +277,20 @@ else wifi_power_reset_configure_pre_v3(); } + +static const struct soc_amd_gpio gpio_sleep_table[] = { + /* PEN_POWER_EN */ + PAD_GPO(GPIO_5, LOW), + /* PCIE_RST1_L */ + PAD_GPO(GPIO_27, LOW), + /* NVME_AUX_RESET_L */ + PAD_GPO(GPIO_40, LOW), + /* EN_PWR_CAMERA */ + PAD_GPO(GPIO_76, LOW), +}; + +const __weak struct soc_amd_gpio *variant_sleep_gpio_table(size_t *size, int slp_typ) +{ + *size = ARRAY_SIZE(gpio_sleep_table); + return gpio_sleep_table; +} diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c index 2191793..c9ad96b 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c @@ -268,3 +268,20 @@ else wifi_power_reset_configure_pre_v3(); } + +static const struct soc_amd_gpio gpio_sleep_table[] = { + /* PEN_POWER_EN */ + PAD_GPO(GPIO_5, LOW), + /* PCIE_RST1_L */ + PAD_GPO(GPIO_27, LOW), + /* NVME_AUX_RESET_L */ + PAD_GPO(GPIO_40, LOW), + /* EN_PWR_CAMERA */ + PAD_GPO(GPIO_76, LOW), +}; + +const __weak struct soc_amd_gpio *variant_sleep_gpio_table(size_t *size, int slp_typ) +{ + *size = ARRAY_SIZE(gpio_sleep_table); + return gpio_sleep_table; +}