Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38236 )
Change subject: soc/intel/baytrail: Add SOUTHBRIDGE_INTEL_COMMON_SMBUS ......................................................................
soc/intel/baytrail: Add SOUTHBRIDGE_INTEL_COMMON_SMBUS
Change-Id: Ie026b8c57046d951752158fd28277e338ed1421c Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/soc/intel/baytrail/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/38236/1
diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig index 4e92237..1fd9c40 100644 --- a/src/soc/intel/baytrail/Kconfig +++ b/src/soc/intel/baytrail/Kconfig @@ -18,6 +18,7 @@ select SUPPORT_CPU_UCODE_IN_CBFS select HAVE_SMI_HANDLER select SOUTHBRIDGE_INTEL_COMMON_RESET + select SOUTHBRIDGE_INTEL_COMMON_SMBUS select SOUTHBRIDGE_INTEL_COMMON_SPI_SILVERMONT select NO_FIXED_XIP_ROM_SIZE select PARALLEL_MP
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38236 )
Change subject: soc/intel/baytrail: Add SOUTHBRIDGE_INTEL_COMMON_SMBUS ......................................................................
Patch Set 1: Code-Review+1
Has this been tested?
Let me guess, that is now my job, right?
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38236 )
Change subject: soc/intel/baytrail: Add SOUTHBRIDGE_INTEL_COMMON_SMBUS ......................................................................
Patch Set 2: Code-Review+2
Can't test in a reasonable timeframe. Should be fine
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38236 )
Change subject: soc/intel/baytrail: Add SOUTHBRIDGE_INTEL_COMMON_SMBUS ......................................................................
soc/intel/baytrail: Add SOUTHBRIDGE_INTEL_COMMON_SMBUS
Change-Id: Ie026b8c57046d951752158fd28277e338ed1421c Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/38236 Reviewed-by: Angel Pons th3fanbus@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/baytrail/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig index 4e92237..1fd9c40 100644 --- a/src/soc/intel/baytrail/Kconfig +++ b/src/soc/intel/baytrail/Kconfig @@ -18,6 +18,7 @@ select SUPPORT_CPU_UCODE_IN_CBFS select HAVE_SMI_HANDLER select SOUTHBRIDGE_INTEL_COMMON_RESET + select SOUTHBRIDGE_INTEL_COMMON_SMBUS select SOUTHBRIDGE_INTEL_COMMON_SPI_SILVERMONT select NO_FIXED_XIP_ROM_SIZE select PARALLEL_MP
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Angel Pons (Code Review) -
Kyösti Mälkki (Code Review)
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Patrick Georgi (Code Review)